| |
| Accepted
Paper Session Index |
| Click on the session name to
link to a list of papers from that session. Use the Find
feature of your browser to search for a particular title or
paper number. |
| |
| Analog Circuits |
| |
| Tuesday, May 28, 3:30 - 5:00:
Circuit Linearization
(Lecture) |
| Monday, May 27, 1:30 - 3:00:
Analog-to-Digital Conversion
(Lecture) |
| Tuesday, May 28, 1:30 - 3:00:
Delta-Sigma Modulators I
(Lecture) |
| Wednesday, May 29, 8:30 -
10:00: Adaptive Circuits
(Lecture) |
| Wednesday, May 29, 10:30 -
12:00: Floating-Gate Circuits
(Lecture) |
| Tuesday, May 28, 3:30 - 5:00:
Low-Voltage Amplifiers
(Lecture) |
| Wednesday, May 29, 10:30 -
12:00: Switched-Capacitor Filters
(Lecture) |
| Monday, May 27, 10:30 -
12:00: Analog Testability
(Lecture) |
| Monday, May 27, 10:30 -
12:00: RF Mixers
(Lecture) |
| Tuesday, May 28, 10:30 -
12:00: Self-Correcting ADC
(Lecture) |
| Monday, May 27, 10:30 -
12:00: Digital-to-Analog Conversion
(Lecture) |
| Tuesday, May 28, 8:30 -
10:00: ADC Characterization
(Lecture) |
| Tuesday, May 28, 3:30 - 5:00:
Delta-Sigma Modulators II
(Lecture) |
| Tuesday, May 28, 1:30 - 3:00:
Reference Circuits
(Lecture) |
| Monday, May 27, 3:30 - 5:00:
Circuit Theory and Applications
(Lecture) |
| Wednesday, May 29, 1:30 -
3:00: Biomedical Circuits
(Lecture) |
| Wednesday, May 29, 10:30 -
12:00: Gm-C Filters
(Lecture) |
| Wednesday, May 29, 1:30 -
3:00: Current-Mode Circuits
(Lecture) |
| Tuesday, May 28, 10:30 -
12:00: Fast-Settling Amplifiers
(Lecture) |
| Wednesday, May 29, 1:30 -
3:00: Comparators
(Lecture) |
| Tuesday, May 28, 1:30 - 3:00:
Vision Chips
(Lecture) |
| Wednesday, May 29, 3:30 -
5:00: Analog VLSI and Neuromorphic Systems
(Lecture) |
| Wednesday, May 29, 1:30 -
3:00: Tuning Circuits I
(Lecture) |
| Tuesday, May 28, 1:30 - 3:00:
Translinear and Companding Filters
(Lecture) |
| Wednesday, May 29, 8:30 -
10:00: Continuous-Time Delta-Sigma Modulation
(Lecture) |
| Tuesday, May 28, 3:30 - 5:00:
Analog Computing Circuits
(Lecture) |
| Monday, May 27, 1:30 - 3:00:
Filter Theory and Linear Networks
(Lecture) |
| Monday, May 27, 3:30 - 5:00:
Pipelined ADC
(Lecture) |
| Monday, May 27, 1:30 - 3:00:
RF Filter Systems
(Lecture) |
| Monday, May 27, 3:30 - 5:00:
RF Filter Circuits
(Lecture) |
| Tuesday, May 28, 10:30 -
12:00: Integrated Inductors
(Lecture) |
| Tuesday, May 28, 8:30 -
10:00: Operational Amplifiers
(Lecture) |
| Tuesday, May 28, 8:30 -
10:00: Oscillators and Phase Locking
(Lecture) |
| Wednesday, May 29, 8:30 -
10:00: Active Filters
(Lecture) |
| Wednesday, May 29, 3:30 -
5:00: Tuning Circuits II
(Lecture) |
| Wednesday, May 29, 3:30 -
5:00: Sample-and Hold Circuits
(Lecture) |
| Wednesday, May 29, 1:30 -
3:00: Analog Computing and Neuromorphic
Circuits (Poster) |
| Wednesday, May 29, 3:30 -
5:00: Analog Computing and Neuromorphic
Circuits (Poster) |
| Monday, May 27, 10:30 -
12:00: Transconductance and Low-Voltage
Amplifiers (Poster) |
| Monday, May 27, 1:30 - 3:00:
Amplifiers, References and Multipliers
(Poster) |
| Monday, May 27, 1:30 - 3:00:
Amplifiers, References and Multipliers
(Poster) |
| Monday, May 27, 10:30 -
12:00: Transconductance and Low-Voltage
Amplifiers (Poster) |
| Monday, May 27, 3:30 - 5:00:
Active Filters
(Poster) |
| Tuesday, May 28, 8:30 -
10:00: Oversampled Data Conversion
(Poster) |
| Tuesday, May 28, 8:30 -
10:00: Oversampled Data Conversion
(Poster) |
| Tuesday, May 28, 10:30 -
12:00: Nyquist Data Conversion
(Poster) |
| Tuesday, May 28, 10:30 -
12:00: Nyquist Data Conversion
(Poster) |
| Tuesday, May 28, 1:30 - 3:00:
Network Theory and Linear Systems
(Poster) |
| Tuesday, May 28, 1:30 - 3:00:
Network Theory and Linear Systems
(Poster) |
| Tuesday, May 28, 1:30 - 3:00:
Network Theory and Linear Systems
(Poster) |
| Tuesday, May 28, 3:30 - 5:00:
RF, Sensors, and Imagers
(Poster) |
| Tuesday, May 28, 3:30 - 5:00:
RF, Sensors, and Imagers
(Poster) |
| Wednesday, May 29, 8:30 -
10:00: Active Filters
(Poster) |
| |
| Communication Circuits and
Hardware (Wireless, Wireline Communication
Circuits) |
| |
| Tuesday, May 28, 8:30 -
10:00: Wireline Communication Architectures
Oral 2 (Lecture) |
| Monday, May 27, 10:30 -
12:00: Wireless Communication Architectures
Oral 1 (Lecture) |
| Tuesday, May 28, 10:30 -
12:00: Communication RF Circuits Oral 3
(Lecture) |
| Wednesday, May 29, 8:30 -
10:00: RF VCO divider Circuits Oral 4
(Lecture) |
| Wednesday, May 29, 10:30 -
12:00: RF amplifiers/ mixers Circuits Oral 5
(Lecture) |
| Tuesday, May 28, 1:30 - 3:00:
Wireless LAN Design Oral 6
(Lecture) |
| Tuesday, May 28, 3:30 - 5:00:
RF filters Design and Implementation
Oral 7 (Lecture) |
| Wednesday, May 29, 3:30 -
5:00: Wirelesss LANs Architectures Oral 8
(Lecture) |
| Tuesday, May 28, 3:30 - 5:00:
Wireless Communication Systems Poster 1
(Poster) |
| Wednesday, May 29, 1:30 -
3:00: Comm Circuits I Poster 2
(Poster) |
| Wednesday, May 29, 1:30 -
3:00: Comm Circuits II Poster 3
(Poster) |
| Wednesday, May 29, 1:30 -
3:00: Comm Circuits III Poster 4
(Poster) |
| |
| ASIC, VLSI, and Digital
Circuits |
| |
| Monday, May 27, 1:30 - 3:00:
VLSI Arithmetic Circuits
(Lecture) |
| Monday, May 27, 3:30 - 5:00:
VLSI Arithmetic Systems
(Lecture) |
| Tuesday, May 28, 8:30 -
10:00: Cryptograghy Architectures
(Lecture) |
| Monday, May 27, 10:30 -
12:00: VLSI Arithmetic Architectures
(Lecture) |
| Tuesday, May 28, 10:30 -
12:00: Logarithmic and Residue Arithmetic
(Lecture) |
| Tuesday, May 28, 1:30 - 3:00:
VLSI Circuits Styles
(Lecture) |
| Tuesday, May 28, 3:30 - 5:00:
VLSI Circuits
(Lecture) |
| Wednesday, May 29, 10:30 -
12:00: Memory Circuits
(Lecture) |
| Wednesday, May 29, 1:30 -
3:00: VLSI Circuits
(Lecture) |
| Monday, May 27, 10:30 -
12:00: System Level Issues
(Lecture) |
| Wednesday, May 29, 8:30 -
10:00: Low-Noise Circuits and Interconect
Issues (Lecture) |
| Monday, May 27, 1:30 - 3:00:
Low-Power VLSI Systems
(Lecture) |
| Monday, May 27, 3:30 - 5:00:
Channel Coding Architectures
(Lecture) |
| Tuesday, May 28, 8:30 -
10:00: System-on-Chip Methodologies
(Lecture) |
| Wednesday, May 29, 3:30 -
5:00: ESD and DSM Issues
(Lecture) |
| Tuesday, May 28, 10:30 -
12:00: High-Speed VLSI Circuits
(Lecture) |
| Tuesday, May 28, 1:30 - 3:00:
Wireless Architectures
(Lecture) |
| Tuesday, May 28, 3:30 - 5:00:
Imaging Architectures
(Lecture) |
| Wednesday, May 29, 8:30 -
10:00: VLSI Signal Processing Architectures
(Lecture) |
| Wednesday, May 29, 10:30 -
12:00: VLSI Networks
(Lecture) |
| Wednesday, May 29, 1:30 -
3:00: Video Architectures
(Lecture) |
| Wednesday, May 29, 3:30 -
5:00: VLSI Architectures
(Lecture) |
| Wednesday, May 29, 3:30 -
5:00: Finite Field and Reed-Solomon
Architectures (Poster) |
| Tuesday, May 28, 1:30 - 3:00:
VLSI Arithmetic
(Poster) |
| Wednesday, May 29, 3:30 -
5:00: Configurable Systems
(Poster) |
| Wednesday, May 29, 1:30 -
3:00: Floating-Gate Circuits
(Poster) |
| Tuesday, May 28, 3:30 - 5:00:
Low-Power Methodologies
(Poster) |
| Wednesday, May 29, 10:30 -
12:00: VLSI Implementations
(Poster) |
| Wednesday, May 29, 10:30 -
12:00: VLSI Implementations
(Poster) |
| Wednesday, May 29, 8:30 -
10:00: Testing,Error and Fault Tolerances
(Poster) |
| Wednesday, May 29, 1:30 -
3:00: Communications Circuits
(Poster) |
| |
| CAD and Modeling |
| |
| Tuesday, May 28, 10:30 -
12:00: floorplanning and placement
(Lecture) |
| Monday, May 27, 1:30 - 3:00:
analog modeling
(Lecture) |
| Monday, May 27, 10:30 -
12:00: interconnect modeling and optimization
(Lecture) |
| Wednesday, May 29, 8:30 -
10:00: Power Optimization and circuit
simulation (Lecture) |
| Wednesday, May 29, 10:30 -
12:00: high level synthesis
(Lecture) |
| Wednesday, May 29, 1:30 -
3:00: mixed signal circuit and device
modeling (Lecture) |
| Monday, May 27, 3:30 - 5:00:
analog synthesis and optimization
(Lecture) |
| Tuesday, May 28, 8:30 -
10:00: power estimation
(Lecture) |
| Tuesday, May 28, 1:30 - 3:00:
Digital Circuits Synthesis &
Optimization (Lecture) |
| Tuesday, May 28, 3:30 - 5:00:
device and interconnect modeling
(Lecture) |
| Wednesday, May 29, 3:30 -
5:00: noise modeling and minimization
(Lecture) |
| Wednesday, May 29, 3:30 -
5:00: embedded system synthesis and
optimization (Lecture) |
| Monday, May 27, 1:30 - 3:00:
testing
(Lecture) |
| Wednesday, May 29, 1:30 -
3:00: verification
(Lecture) |
| Wednesday, May 29, 3:30 -
5:00: fundamental CAD algorithms
(Lecture) |
| Monday, May 27, 10:30 -
12:00: physical design
(Poster) |
| Monday, May 27, 1:30 - 3:00:
analog modeling, synthesis and
optimization (Poster) |
| Monday, May 27, 3:30 - 5:00:
numerical and combinatorial optimiztion
(Poster) |
| Tuesday, May 28, 10:30 -
12:00: testing and verification
(Poster) |
| Tuesday, May 28, 3:30 - 5:00:
synthesis
(Poster) |
| Wednesday, May 29, 10:30 -
12:00: modeling and simulation
(Poster) |
| Wednesday, May 29, 8:30 -
10:00: Optimization in CAD
(Poster) |
| |
| Power Systems and
Circuits |
| |
| Tuesday, May 28, 1:30 - 3:00:
Analysis,Design and Simulation of Power
Electronics Circuits (Lecture) |
| Tuesday, May 28, 3:30 - 5:00:
DC SWitching Mode Power Supplies
(Lecture) |
| Wednesday, May 29, 8:30 -
10:00: Power Factor Correction Rectifiers and
Inverters (Lecture) |
| Wednesday, May 29, 10:30 -
12:00: Control in Power Electronics
(Lecture) |
| Wednesday, May 29, 3:30 -
5:00: Power Systems
(Lecture) |
| Wednesday, May 29, 1:30 -
3:00: Power Systems Lecture
(Lecture) |
| Wednesday, May 29, 10:30 -
12:00: Power Systems Poster 3
(Poster) |
| Wednesday, May 29, 3:30 -
5:00: Power Electronics circuits and Systems
Poster 1 (Poster) |
| Wednesday, May 29, 3:30 -
5:00: Power Electronics circuits andSystems
Poster 2 (Poster) |
| |
| Non-Linear Circuits and
Systems |
| |
| Wednesday, May 29, 1:30 -
3:00: Nonlinear Phenomena in Oscillators
(Lecture) |
| Wednesday, May 29, 10:30 -
12:00: Phase-Locked Loops and Synthesizers
(Lecture) |
| Wednesday, May 29, 8:30 -
10:00: Design and Analysis of Oscillators
(Lecture) |
| Monday, May 27, 1:30 - 3:00:
Nonlinear Circuit Analysis Methods
(Lecture) |
| Tuesday, May 28, 8:30 -
10:00: Chaotic Circuits
(Lecture) |
| Tuesday, May 28, 10:30 -
12:00: Applications of Chaos
(Lecture) |
| Tuesday, May 28, 1:30 - 3:00:
Chaos and Information Processing
(Lecture) |
| Tuesday, May 28, 3:30 - 5:00:
Chaotic Communications and Signal
Processing (Lecture) |
| Monday, May 27, 3:30 - 5:00:
Modeling of Nonlinear Systems
(Lecture) |
| Monday, May 27, 10:30 -
12:00: Stability and Control
(Lecture) |
| Monday, May 27, 10:30 -
12:00: Bifurcation and Chaos
(Poster) |
| Tuesday, May 28, 10:30 -
12:00: Voltage-Controlled Oscillators and
Phase-Locked Loops (Poster) |
| Wednesday, May 29, 8:30 -
10:00: Nonlinear Circuit Design and
Implementation (Poster) |
| Tuesday, May 28, 1:30 - 3:00:
Modeling and Analysis of Nonlinear
Systems (Poster) |
| |
| Digital Signal
Processing |
| |
| Monday, May 27, 3:30 - 5:00:
Multidimentional Signal Processing
(Lecture) |
| Monday, May 27, 10:30 -
12:00: Adaptive Filtering
(Lecture) |
| Monday, May 27, 1:30 - 3:00:
DSP System Implementation
(Lecture) |
| Wednesday, May 29, 8:30 -
10:00: Signal Processing for Communications
(Lecture) |
| Monday, May 27, 3:30 - 5:00:
Filter Banks
(Lecture) |
| Tuesday, May 28, 10:30 -
12:00: Adaptive Signal Processing
(Lecture) |
| Tuesday, May 28, 1:30 - 3:00:
Transforms and Multirate Systems
(Lecture) |
| Tuesday, May 28, 3:30 - 5:00:
Speech Processing
(Lecture) |
| Monday, May 27, 10:30 -
12:00: DSP for Communications I
(Lecture) |
| Tuesday, May 28, 8:30 -
10:00: DSP for Communications II
(Lecture) |
| Wednesday, May 29, 10:30 -
12:00: Digital Signal Processing Applications
(Lecture) |
| Wednesday, May 29, 10:30 -
12:00: Implementation of DSP Systems
(Lecture) |
| Wednesday, May 29, 8:30 -
10:00: FIR Filters
(Lecture) |
| Monday, May 27, 1:30 - 3:00:
FIR Filter Design and Implementation
(Lecture) |
| Tuesday, May 28, 10:30 -
12:00: IIR Digital Filters
(Lecture) |
| Wednesday, May 29, 1:30 -
3:00: Multirate Systems and Coding
(Lecture) |
| Wednesday, May 29, 3:30 -
5:00: Digital Filters
(Lecture) |
| Monday, May 27, 3:30 - 5:00:
Signal Processing Systems
(Poster) |
| Tuesday, May 28, 8:30 -
10:00: Signal Processing Algorithms
(Poster) |
| Monday, May 27, 3:30 - 5:00:
Audio and Speech Processing
(Poster) |
| Wednesday, May 29, 1:30 -
3:00: Adaptive Systems: Analysis and
Applications (Poster) |
| Wednesday, May 29, 10:30 -
12:00: Wavelets and Multirate Systems
(Poster) |
| Tuesday, May 28, 3:30 - 5:00:
Filter Banks and Multirate Systems
(Poster) |
| Tuesday, May 28, 1:30 - 3:00:
Applications of DSP in Communications
(Poster) |
| Monday, May 27, 10:30 -
12:00: DSP System Design and Implementation
(Poster) |
| Wednesday, May 29, 8:30 -
10:00: Digital Filter Analysis and Design
(Poster) |
| Wednesday, May 29, 3:30 -
5:00: Analysis, Design, and Implementation of
DSP Systems (Poster) |
| |
| Blind DSP |
| |
| Monday, May 27, 10:30 -
12:00: Blind DSP Oral 1
(Lecture) |
| Monday, May 27, 1:30 - 3:00:
Blind DSP Poster 1
(Poster) |
| |
| Multimedia |
| |
| Tuesday, May 28, 1:30 - 3:00:
Multimedia Watermarking 1
(Lecture) |
| Tuesday, May 28, 3:30 - 5:00:
Multimedia Watermarking 2
(Lecture) |
| Tuesday, May 28, 8:30 -
10:00: Hardware Implementation for Multimedia
1 (Lecture) |
| Tuesday, May 28, 10:30 -
12:00: Multimedia Communication and
Transmission 1 (Lecture) |
| Wednesday, May 29, 8:30 -
10:00: Multimedia Retrieval Systems
(Lecture) |
| Wednesday, May 29, 10:30 -
12:00: Multimedia Coding
(Lecture) |
| Monday, May 27, 3:30 - 5:00:
Multimedia Understanding and
Segmentation (Lecture) |
| Wednesday, May 29, 3:30 -
5:00: Wireless Multimedia Transmission and
Packetization (Lecture) |
| Monday, May 27, 1:30 - 3:00:
Hardware Implementation for Multimedia
2 (Poster) |
| Monday, May 27, 10:30 -
12:00: Multimedia Communication and
Transmission 2 (Poster) |
| Monday, May 27, 3:30 - 5:00:
3D Graphics and Other Topics in
Multimedia (Poster) |
| |
| Communication Systems and
Theory |
| |
| Monday, May 27, 3:30 - 5:00:
Communication Circuits / Implementation
(Lecture) |
| Monday, May 27, 1:30 - 3:00:
Topics in Communication Theory
(Lecture) |
| Tuesday, May 28, 10:30 -
12:00: Communication Networks
(Lecture) |
| Monday, May 27, 10:30 -
12:00: Multiple Antenna Systems / OFDM
(Lecture) |
| Tuesday, May 28, 8:30 -
10:00: Signal Processing for Communications
(Lecture) |
| Wednesday, May 29, 8:30 -
10:00: Signal Processing for Communications II
(Poster) |
| Wednesday, May 29, 10:30 -
12:00: Topics in Communication Theory II
(Poster) |
| |
| Neural Systems and Cellular
Neural Networks |
| |
| Tuesday, May 28, 8:30 -
10:00: Neural Network Hardware Architecture
and Implementation (Lecture) |
| Monday, May 27, 1:30 - 3:00:
Cellular Neural Networks
(Lecture) |
| Monday, May 27, 3:30 - 5:00:
Neural Network Hardware Architecture
and Implementation (Lecture) |
| Monday, May 27, 10:30 -
12:00: Cellular Neural Networks
(Lecture) |
| Tuesday, May 28, 10:30 -
12:00: Other Areas in NN&CNN
(Poster) |
| |
| Video Signal Processing and
Image Communication |
| |
| Tuesday, May 28, 8:30 -
10:00: Fast Motion Estimation Oral 1
(Lecture) |
| Tuesday, May 28, 1:30 - 3:00:
Video over Networks Oral 2
(Lecture) |
| Tuesday, May 28, 10:30 -
12:00: Global and Local Motion Estimation Oral
3 (Lecture) |
| Tuesday, May 28, 3:30 - 5:00:
Video Segmentation Oral 4
(Lecture) |
| Wednesday, May 29, 1:30 -
3:00: Image Processing Oral 5
(Lecture) |
| Wednesday, May 29, 10:30 -
12:00: Transcoding and Edge Detection Oral 6
(Lecture) |
| Wednesday, May 29, 8:30 -
10:00: Hardware for Video Signal Processing
Oral 7 (Lecture) |
| Wednesday, May 29, 3:30 -
5:00: Detection Oral 8
(Lecture) |
| Monday, May 27, 1:30 - 3:00:
Image Compression Poster 1
(Poster) |
| Monday, May 27, 3:30 - 5:00:
Image Processing and Sensors Poster 3
(Poster) |
| Tuesday, May 28, 8:30 -
10:00: Video Signal Processing Poster 4
(Poster) |
| Tuesday, May 28, 8:30 -
10:00: Applications for Image and Video
Processing Poster 2 (Poster) |
| |
| MEM |
| |
| Monday, May 27, 1:30 - 3:00:
MEM Devices
(Lecture) |
| Monday, May 27, 3:30 - 5:00:
Sensors and Processing Circuits
(Lecture) |
| Tuesday, May 28, 8:30 -
10:00: MEMS, Sensors and Processing Systems
(Poster) |
| |
| Nanoelectronics and
Giga-scale Systems |
| |
| Wednesday, May 29, 1:30 -
3:00: Nanoelectronics Oral 1
(Lecture) |
| Wednesday, May 29, 3:30 -
5:00: Nanoelectronics Poster 1
(Poster) |
| |
| Special Sessions |
| |
| Monday, May 27, 3:30 - 5:00:
Signal Processing for Communications
(Lecture) |
| |
| Special Sessions |
| |
| Tuesday, May 28, 10:30 -
12:00: Speech and Audio Processing
(Lecture) |
| |
| Special Sessions |
| |
| Wednesday, May 29, 10:30 -
12:00: Digital Methods for Improving
Delta-Sigma Performance (Lecture) |
| |
| Special Sessions |
| |
| Tuesday, May 28, 1:30 - 3:00:
Frequency Response Masking Techniques
(Lecture) |
| |
| Special Sessions |
| |
| Wednesday, May 29, 8:30 -
10:00: Bionics and CNN Technology
(Lecture) |
| |
| Special Sessions |
| |
| Tuesday, May 28, 8:30 -
10:00: Smart Sensors 1
(Lecture) |
| Tuesday, May 28, 10:30 -
12:00: Smart Sensors 2
(Lecture) |
| |
| Special Sessions |
| |
| Tuesday, May 28, 3:30 - 5:00:
Advanced Signal Processing for MIMO
Systems (Lecture) |
| |
| Special Sessions |
| |
| Wednesday, May 29, 1:30 -
3:00: Electronic Design for Quality
(Lecture) |
| |
| Special Sessions |
| |
| Monday, May 27, 3:30 - 5:00:
Towards Nanoelectronic Integrated
Circuits (Lecture) |
| |
| Special Sessions |
| |
| Monday, May 27, 1:30 - 3:00:
Multimedia over IP and over Wireless
Network II (Lecture) |
| Monday, May 27, 10:30 -
12:00: Multimedia over IP and over Wireless
Network I (Lecture) |
| |
| Special Sessions |
| |
| Wednesday, May 29, 3:30 -
5:00: Modeling, Simulation and Design of
Power Electronics Circuits (Lecture) |
| |
| Special Sessions |
| |
| Wednesday, May 29, 8:30 -
10:00: Interconnected array systems (CNNs) and
unconventional devices and materials
(Lecture) |
| |
| Special Sessions |
| |
| Tuesday, May 28, 8:30 -
10:00: Multimedia Watermarking
(Lecture) |
| |
| Special Sessions |
| |
| Tuesday, May 28, 1:30 - 3:00:
Multidimensional Signals and Systems
(Lecture) |
| |
| Special Sessions |
| |
| Tuesday, May 28, 3:30 - 5:00:
Computational Graph Theory for Computer
and Communication Systems (Lecture) |
| |
| Special Sessions |
| |
| Wednesday, May 29, 10:30 -
12:00: Statistical Methodologies for Nonlinear
Signal Processing (Lecture) |
| Top |
| |
Tuesday, May 28, 3:30 - 5:00:
Circuit
Linearization
|
| |
| 2915: DESIGN OF A BODY-EFFECT
REDUCED-SOURCE FOLLOWER AND ITS APPLICATION TO LINEARIZATION
TECHNIQUE |
| |
| 2639: A WIDE-LINEAR-RANGE
SUBTHRESHOLD CMOS TRANSCONDUCTOR EMPLOYING THE BACK-GATE
EFFECT |
| |
| 1181: DESIGN OF HIGHLY LINEAR
TUNABLE CMOS OTA |
| |
| 1887: A HIGHLY LINEAR
LOW-VOLTAGE MOS TRANSCONDUCTOR |
| |
| 1779: A THRESHOLD VOLTAGE
INDEPENDENT FLOATING RESISTOR CIRCUIT EXIHIBITING BOTH
POSITIVE AND NEGATIVE RESISTANCE VALUES |
| |
| Top |
| |
Monday, May 27, 1:30 - 3:00:
Analog-to-Digital
Conversion
|
| |
| 1308: A 15-BIT CMOS CYCLIC
A/D CONVERTER WITH CORRELATED DOUBLE SAMPLING |
| |
| 2405: A 10-BIT 1 MS/S 3-STEP
ADC WITH BITSTREAM-BASED SUB-DAC AND SUB-ADC
CALIBRATION |
| |
| 1872: AN ANALOG-TO-DIGITAL
CONVERTER WITH TIME-VARIANT WINDOW |
| |
| 2539: WALLACE TREE ENCODING
IN FOLDING AND INTERPOLATION ADCS |
| |
| 2802: A
NONLINEARITY-CORRECTED CMOS TIME DIGITIZER IC WITH 20 PS
SINGLE-SHOT PRECISION |
| |
| Top |
| |
Tuesday, May 28, 1:30 - 3:00:
Delta-Sigma
Modulators I
|
| |
| 2828: LINEARITY ENHANCEMENT
OF MULTIBIT DELTA-SIGMA MODULATORS USING PSEUDO DATA-WEIGHTED
AVERAGING |
| |
| 1856: A NOVEL TECHNIQUE TO
ESTIMATE THE STATISTICAL PROPERTIES OF SIGMA-DELTA A/D
CONVERTERS FOR THE INVESTIGATION OF DC STABILITY |
| |
| 2060: A NEW KIND OF LOW-POWER
MULTIBIT THIRD ORDER SIGMA-DELTA-MODULATOR |
| |
| 1939: BICMOS SWITCHED BUFFERS
RESONATOR FOR A 320 MHZ 2-PATH SIGMA-DELTA
MODULATOR |
| |
| 2280: A 2.5-V SIGMA-DELTA
MODULATOR IN 0.25-UM CMOS FOR ADSL |
| |
| Top |
| |
Wednesday, May 29, 8:30 -
10:00: Adaptive
Circuits
|
| |
| 2284: A SILICON MODEL OF AN
ADAPTING MOTONEURON |
| |
| 3028: A CURVATURE
COMPENSATION TECHNIQUE FOR BANDGAP VOLTAGE REFERENCES USING
ADAPTIVE REFERENCE TEMPERATURE |
| |
| 1537: ANALOG FILTER
ADAPTATION USING A DITHERED LINEAR SEARCH
ALGORITHM |
| |
| 1732: AN ADAPTIVE ANALOG
VIDEO LINE DRIVER WITH IMPEDANCE MATCHING BASED ON PEAK
DETECTION |
| |
| 3065: TONAL BEHAVIOR ANALYSIS
OF AN ADAPTIVE SECOND-ORDER SIGMA-DELTA MODULATOR
|
| |
| Top |
| |
Wednesday, May 29, 10:30 -
12:00: Floating-Gate
Circuits
|
| |
| 1881: A ZONE-PROGRAMMED
EEPROM WITH REAL-TIME WRITE MONITORING FOR ANALOG DATA
STORAGE |
| |
| 2820: A LOW-VOLTAGE
WIDE-SWING FGMOS CURRENT AMPLIFIER |
| |
| 2858: TUNABLE FLOATING-GATE
LOW-VOLTAGE TRANSCONDUCTOR |
| |
| 2846: A 2V 11 BIT INCREMENTAL
A/D CONVERTER USING FLOATING GATE TECHNIQUE |
| |
| 2968: MEL-FREQUENCY CEPSTRUM
ENCODING IN ANALOG FLOATING-GATE CIRCUITRY |
| |
| Top |
| |
Tuesday, May 28, 3:30 - 5:00:
Low-Voltage
Amplifiers
|
| |
| 2530: A LOW-VOLTAGE CMOS
CLASS-AB OPERATIONAL AMPLIFIER |
| |
| 2291: COMMON-MODE RESPONSE
SHAPING IN RAIL-TO-RAIL OP-AMPS INPUT STAGES |
| |
| 3023: A 0.6V ULTRA LOW
VOLTAGE OPERATIONAL AMPLIFIER |
| |
| 2822: THE FLIPPED VOLTAGE
FOLLOWER: A USEFUL CELL FOR LOW-VOLTAGE LOW-POWER CIRCUIT
DESIGN |
| |
| 2616: A LOW-VOLTAGE MOS
CASCODE BIAS CIRCUIT FOR ALL CURRENT LEVELS |
| |
| Top |
| |
Wednesday, May 29, 10:30 -
12:00: Switched-Capacitor Filters
|
| |
| 2730: THE REDUCTION OF
SAMPLING NOISE IN SWITCHED-CAPACITOR CIRCUITS THROUGH SPATIAL
OVERSAMPLING |
| |
| 2640: A NOVEL DOUBLE SAMPLED
CHOPPER STABILISED INTEGRATOR FOR SWITCHED CAPACITOR SIGMA
DELTA MODULATORS |
| |
| 2664: APPROXIMATING LINEAR
PHASE WITH IIR SC FILTERS |
| |
| 2017: A 3-V 44-MHZ SC
BANDPASS FILTER FOR DIGITAL VIDEO APPLICATION |
| |
| 2328: HIGH-SELECTIVITY SC
FILTERS WITH CONTINUOUS DIGITAL Q-FACTOR
PROGRAMMABILITY |
| |
| Top |
| |
Monday, May 27, 10:30 -
12:00: Analog
Testability
|
| |
| 2289: AN SUBSTRATE NOISE
CIRCUIT FOR ACCURATELY TESTING MIXED-SIGNAL ICS |
| |
| 2848: INNOVATIVE BUILT-IN
SELF-TEST SCHEME FOR ON-CHIP DIAGNOSIS, COMPLIANT WITH THE
IEEE 1149.4 MIXED-SIGNAL TEST BUS STANDARD |
| |
| 1473: A NEURAL NETWORK
APPROACH FOR FAULT DIAGNOSIS OF LARGE-SCALE ANALOGUE
CIRCUITS |
| |
| 2785: THE QUALITATIVE FORM OF
OPTIMUM TRANSIENT TEST SIGNALS FOR ANALOG CIRCUITS DERIVED
FROM CONTROL THEORY METHODS |
| |
| 2925: FAULT LOCATION OF
SINGLE-PHASE TRANSMISSION LINES BY LAGUERRE
FUNCTION |
| |
| Top |
| |
Monday, May 27, 10:30 -
12:00: RF
Mixers
|
| |
| 2466: A VERY LOW-VOLTAGE
(0.8V) CMOS RECEIVER FRONTEND FOR 5GHZ RF
APPLICATIONS |
| |
| 1299: CHARGE SAMPLING MIXER
WITH DELTA-SIGMA QUANTIZED IMPULSE RESPONSE |
| |
| 1099: LOW NOISE, HIGH
LINEARITY DOUBLE-BALANCED ACTIVE MIXERS USING LOSSLESS
FEEDBACK |
| |
| 2347: GHZ PROGRAMMABLE
DUAL-MODULUS PRESCALER FOR MULTI-STANDARD WIRELESS
APPLICATIONS |
| |
| 1963: A DIRECT DIGITAL RF
AMPLITUDE MODULATOR |
| |
| Top |
| |
Tuesday, May 28, 10:30 -
12:00: Self-Correcting ADC
|
| |
| 1895: BETA EXPANSIONS: A NEW
APPROACH TO DIGITALLY CORRECTED A/D CONVERSION |
| |
| 3017: A BLIND IDENTIFICATION
APPROACH TO DIGITAL CALIBRATION OF ANALOG-TO-DIGITAL
CONVERTERS |
| |
| 2047: A DIGITAL
SELF-CALIBRATION METHOD FOR PIPELINE A/D
CONVERTERS |
| |
| 2052: RADIX-BASED DIGITAL
CALIBRATION TECHNIQUE FOR MULTI-STAGE ADC |
| |
| 2899: A FAST AND ACCURATE
CALIBRATION METHOD FOR HIGH-SPEED HIGH-RESOLUTION PIPELINE ADC
|
| |
| Top |
| |
Monday, May 27, 10:30 -
12:00: Digital-to-Analog
Conversion
|
| |
| 3019: A NECESSARY AND
SUFFICIENT CONDITION FOR MISMATCH SHAPING IN MULTI-BIT
DACS |
| |
| 2383: DESIGN OF OVERSAMPLING
CURRENT STEERING DAC WITH 640 MHZ EQUIVALENT CLOCK FREQUENCY
|
| |
| 1664: A DIFFERENTIAL DAC
ARCHITECTURE WITH VARIABLE COMMON-MODE LEVEL |
| |
| 1916: A GENERAL ANALYSIS ON
THE TIMING JITTER IN D/A CONVERTERS |
| |
| 1540: A 14-BIT, 40-MS/S DAC
WITH CURRENT MODE DEGLITCHER |
| |
| Top |
| |
Tuesday, May 28, 8:30 -
10:00: ADC
Characterization
|
| |
| 2966: A MODIFIED HISTOGRAM
APPROACH FOR ACCURATE SELF-CHARACTERIZATION OF
ANALOG-TO-DIGITAL CONVERTERS |
| |
| 2131: SNR PROBABILITY IN
TIME-INTERLEAVED ADCS WITH RANDOM CHANNEL
MISMATCHES |
| |
| 2974: STABLE SINGLE-BIT
NOISE-SHAPING QUANTIZER BASED ON DATA CODING INTO OPTIMIZED
BINARY VECTORS |
| |
| 1809: A TECHNIQUE FOR OFFSET
AND GAIN MISMATCH CANCELLATION IN QUADRATURE A/D
CONVERTERS |
| |
| 1888: ACTIVE SPATIAL
FILTERING FOR A/D CONVERTERS |
| |
| Top |
| |
Tuesday, May 28, 3:30 - 5:00:
Delta-Sigma
Modulators II
|
| |
| 1103: DELTA-SIGMA MODULATOR
TOPOLOGIES WITH HIGH-IMMUNITY TO PATTERN NOISE |
| |
| 1362: AN EFFICIENT TECHNIQUE
TO ELIMINATE QUANTISATION NOISE FOLDING IN DOUBLE-SAMPLING
$\SIGMA \DELTA$ MODULATORS |
| |
| 2188: A STRUCTURE OF
CASCADING MULTI-BIT MODULATORS WITHOUT DYNAMIC ELEMENT
MATCHING OR DIGITAL CORRECTION |
| |
| 2462: AN EFFICIENT PARALLEL
DELTA-SIGMA ADC ULTIZING A SHARED MULTI-BIT
QUANTIZER |
| |
| 2892: SPACE-TIME VECTOR
DELTA-SIGMA MODULATION |
| |
| Top |
| |
Tuesday, May 28, 1:30 - 3:00:
Reference
Circuits
|
| |
| 2570: A RESISTORLESS LOW
CURRENT REFERENCE CIRCUIT FOR IMPLANTABLE DEVICES |
| |
| 2382: 1.5V BANDGAP CMOS
CURRENT REFERENCE WITH EXTENDED TEMPERATURE OPERATING
RANGE |
| |
| 2972: LOW VOLTAGE BANDGAP
REFERENCE WITH TEMPERATURE COMPENSATION BASED ON A THRESHOLD
VOLTAGE TECHNIQUE |
| |
| 1572: A LOW-NOISE BANDGAP
REFERENCE VOLTAGE SOURCE WITH CURVATURE
CORRECTION |
| |
| Top |
| |
Monday, May 27, 3:30 - 5:00:
Circuit Theory and
Applications
|
| |
| 1505: INTEGRATORS USING A
SINGLE DISTRIBUTED RC ELEMENT |
| |
| 1129: CIRCUIT TRANSPOSITION
USING SIGNAL-FLOW GRAPHS |
| |
| 1160: WHY THE TERMS 'CURRENT
MODE' AND 'VOLTAGE MODE' NEITHER DIVIDE NOR QUALIFY
CIRCUITS |
| |
| 1471: HARMONIC DISTORTION IN
SINGLE-STAGE AMPLIFIERS |
| |
| 2877: POSITIVE FEEDBACK
GAIN-ENHANCEMENT TECHNIQUES FOR AMPLIFIER DESIGN |
| |
| Top |
| |
Wednesday, May 29, 1:30 -
3:00: Biomedical
Circuits
|
| |
| 2676: A 110 NA PACEMAKER
SENSING CHANNEL IN CMOS ON SILICON-ON-INSULATOR |
| |
| 2143: A 0.9-V 0.2-UW CMOS
SINGLE-OPAMP-BASED SWITCHED-OPAMP SD MODULATOR FOR PACEMAKER
APPLICATIONS |
| |
| 2622: A MICROPOWER BAND-PASS
FILTER FOR USE IN COCHLEAR IMPLANTS |
| |
| 2121: LOW NOISE PREAMPLIFIER
DESIGN FOR NERVE CUFF ELECTRODE RECORDING SYSTEMS |
| |
| 2632: A LOW-POWER, LOW-NOISE
CMOS AMPLIFIER FOR NEURAL RECORDING APPLICATIONS |
| |
| Top |
| |
Wednesday, May 29, 10:30 -
12:00: Gm-C
Filters
|
| |
| 1538: A 5TH ORDER GM-C FILTER
IN 0.25 UM CMOS WITH DIGITALLY PROGRAMMABLE POLES AND
ZEROES |
| |
| 1176: A DESIGN OF A
LOW-POWER, HIGH-ACCURACY, AND CONSTANT-Q TUNING
CONTINUOUS-TIME BANDPASS FILTER |
| |
| 2560: A LOW-POWER 5.4 KHZ
CMOS GM-C BANDPASS FILTER WITH ON-CHIP CENTER FREQUENCY
TUNING |
| |
| 1254: A GENERAL APPROACH TO
CONTINUOUS-TIME GM-C FILTERS BASED ON MATRIX
DESCRIPTION |
| |
| 1366: APPLICATION OF GROUP
DELAY EQUALISATION IN TESTING FULLY-BALANCED OTA-C
FILTERS |
| |
| Top |
| |
Wednesday, May 29, 1:30 -
3:00: Current-Mode
Circuits
|
| |
| 2344: LEVERAGED CURRENT
MIRROR OP AMP |
| |
| 2404: DESIGN TRADEOFFS OF
CMOS CURRENT MIRRORS USING ONE-EQUATION FOR ALL-REGION
MODEL |
| |
| 1173: A HIGH-PERFORMANCE,
LOW-VOLTAGE, BODY-DRIVEN CMOS CURRENT MIRROR |
| |
| 2414: A LOW-VOLTAGE
HIGH-SPEED BICMOS CURRENT SWITCH WITH ENHANCED-SPECTRAL
PERFORMANCE |
| |
| 2924: CURRENT-MODE LEAPFROG
LADDER FILTERS USING CDBAS |
| |
| Top |
| |
Tuesday, May 28, 10:30 -
12:00: Fast-Settling
Amplifiers
|
| |
| 2720: AMPLIFIER STRUCTURE FOR
HIGH GAIN AND FAST SETTLING APPLICATIONS |
| |
| 1472: REVERSED NESTED MILLER
COMPENSATION WITH VOLTAGE FOLLOWER |
| |
| 1880: SINGLE-POINT-DETECTION
SLEW-RATE ENHANCEMENT CIRCUITS FOR SINGLE-STAGE
AMPLIFIERS |
| |
| 2872: A SIMPLE TECHNIQUE TO
SIGNIFICANTLY ENHANCE SLEW RATE AND BANDWIDTH OF ONE-STAGE
CMOS OPERATIONAL AMPLIFIERS |
| |
| 1670: FAST-SETTLING CMOS
TWO-STAGE OPERATIONAL TRANSCONDUCTANCE AMPLIFIERS AND THEIR
SYSTEMATIC DESIGN |
| |
| Top |
| |
Wednesday, May 29, 1:30 -
3:00: Comparators
|
| |
| 2816: AN IMPROVED LOW-VOLTAGE
LOW-POWER CMOS COMPARATOR TO BE USED IN HIGH-SPEED PIPELINE
ADCS |
| |
| 2411: SRAM ORIENTED MEMORY
SENSE AMPLIFIER DESIGN IN 0.18UM CMOS TECHNOLOGY |
| |
| 1223: A NEW OFFSET
MEASUREMENT AND CANCELLATION TECHNIQUE FOR DYNAMIC
LATCHES |
| |
| 2703: CHARGE-BASED MOS
CORRELATED DOUBLE SAMPLING COMPARATOR AND FOLDING
CIRCUIT |
| |
| 2597: CMOS DYNAMIC
COMPARATORS FOR PIPELINE A/D CONVERTERS |
| |
| Top |
| |
Tuesday, May 28, 1:30 - 3:00:
Vision
Chips
|
| |
| 2789: A NOVEL INTEGRATION OF
ON-SENSOR WAVELET COMPRESSION FOR A CMOS IMAGER |
| |
| 2380: A CMOS IMAGER WITH
REAL-TIME FRAME DIFFERENCING AND CENTROID
COMPUTATION |
| |
| 2059: A MOTION-BASED ANALOG
VLSI SALIENCY DETECTOR USING QUASI-TWO-DIMENSIONAL HARDWARE
ALGORITHM |
| |
| 3071: A MATRIX TRANSFORM
IMAGER ALLOWING HIGH-FILL FACTOR |
| |
| 2330: A PROCESSING ELEMENT
ARCHITECTURE FOR HIGH-DENSITY FOCAL PLANE ANALOG PROGRAMMABLE
ARRAY PROCESSORS |
| |
| Top |
| |
Wednesday, May 29, 3:30 -
5:00: Analog VLSI
and Neuromorphic Systems
|
| |
| 3084: BIOLOGICAL LEARNING
MODELED IN AN ADAPTIVE FLOATING-GATE SYSTEM |
| |
| 2334: BIO-INSPIRED ANALOG
PARALLEL ARRAY PROCESSOR CHIP WITH PROGRAMMABLE
SPATIO-TEMPORAL DYNAMICS |
| |
| 2578: DELTA-SIGMA MODULATION
IN SINGLE NEURONS |
| |
| 2222: MAPPING THE WAVELET
TRANSFORM ONTO SILICON: THE DYNAMIC TRANSLINEAR
APPROACH |
| |
| 1927: LOW-POWER CDMA ANALOG
MATCHED FILTERS BASED ON FLOATING-GATE TECHNOLOGY |
| |
| Top |
| |
Wednesday, May 29, 1:30 -
3:00: Tuning
Circuits I
|
| |
| 2938: CONCEPT OF PHASE-NOISE
TUNING OF BIPOLAR VOLTAGE-CONTROLLED OSCILLATORS |
| |
| 2658: AN IMPROVED Q-TUNING
SCHEME AND A FULLY SYMMETRIC OTA |
| |
| 2093: A 57-DB IMAGE BAND
REJECTION CMOS GM-C POLYPHASE FILTER WITH AUTOMATIC FREQUENCY
TUNING FOR BLUETOOTH |
| |
| 2457: A 1.8V CMOS, 80-200MHZ
CONTINUOUS-TIME 4TH-ORDER 0.05O EQUIRIPPLE LINEAR PHASE FILTER
WITH AUTOMATIC TUNING SYSTEM |
| |
| 2663: AUTOMATIC TUNING OF
LINEARLY TUNABLE HIGH-Q FILTERS |
| |
| Top |
| |
Tuesday, May 28, 1:30 - 3:00:
Translinear and
Companding Filters
|
| |
| 1973: DESIGN CONSIDERATIONS
AND EXPERIMENTAL EVALUATION OF A SYLLABIC COMPANDING AUDIO
FREQUENCY FILTER |
| |
| 1069: DIRECT NOISE ANALYSIS
OF LOG-DOMAIN FILTERS |
| |
| 2333: HIGH-FREQUENCY DYNAMIC
TRANSLINEAR AND LOG-DOMAIN CIRCUITS IN CMOS
TECHNOLOGY |
| |
| 2879: A MICROPOWER LOG DOMAIN
FGMOS FILTER |
| |
| 2618: SYNTHESIS OF A
TRANSLINEAR ANALOG ADAPTIVE FILTER |
| |
| Top |
| |
Wednesday, May 29, 8:30 -
10:00: Continuous-Time Delta-Sigma
Modulation
|
| |
| 1492: A QUADRATURE IF MIXER
WITH HIGH IMAGE REJECTION FOR CONTINUOUS-TIME COMPLEX SIGMA
DELTA MODULTORS |
| |
| 1696: MULTIRATE CASCADED
CONTINUOUS TIME SIGMA DELTA MODULATORS |
| |
| 2295: SYSTEMATIC APPROACH FOR
DISCRETE-TIME TO CONTINUOUS-TIME TRANSFORMATION OF SIGMA-DELTA
MODULATORS |
| |
| 1630: FIGURE OF MERIT BASED
DESIGN STRATEGY FOR LOW-POWER CONTINUOUS-TIME SIGMA-DELTA
MODULATORS |
| |
| 1790: EFFICIENT TIME-DOMAIN
SIMULATION OF CONTINUOUS-TIME DELTA-SIGMA A/D CONVERTERS USING
ANALYTICAL INTEGRATION |
| |
| Top |
| |
Tuesday, May 28, 3:30 - 5:00:
Analog Computing
Circuits
|
| |
| 2790: ANALOGUE VLSI FOR
TEMPORAL FREQUENCY ANALYSIS OF VISUAL DATA |
| |
| 3043: THE MULTIPLE INPUT
LINEAR WEIGHTED DIFFERENTIAL AMPLIFIER: A NEW VERSATILE ANALOG
CIRCUIT BUILDING BLOCK |
| |
| 3002: A VIRTUAL POINT ARRAY
FOR PARABOLIC VOLTAGE INTERPOLATION |
| |
| 2371: A MIXED SIGNAL ENHANCED
WTA TRACKING SYSTEM VIA 2-D DYNAMIC ELEMENT MATCHING
|
| |
| 2064: PURE-CAPACITANCE-LOAD
SOURCE-FOLLOWER COMPARATORS FOR LOW-POWER WINNER-TAKE-ALL
CIRCUITRY |
| |
| Top |
| |
Monday, May 27, 1:30 - 3:00:
Filter Theory and
Linear Networks
|
| |
| 1606: A LIMITATION ON ACTIVE
FILTER DYNAMIC RANGE |
| |
| 1220: NOMOGRAPHS AND
CLASSICAL FILTER SENSITIVITY OPTIMIZATION |
| |
| 1559: CONTINUOUS-TIME LINEAR
SYSTEMS: FOLKLORE AND FACT |
| |
| 2799: STATISTICAL ANALYSIS OF
SWITCHED LINEAR NETWORKS |
| |
| 1164: A MAXIMUM POWER
TRANSFER THEOREM FOR DC LINEAR TWO-PORTS |
| |
| Top |
| |
Monday, May 27, 3:30 - 5:00:
Pipelined
ADC
|
| |
| 1806: DYNAMIC STAGE MATCHING
FOR PARALLEL PIPELINE DYNAMIC STAGE MATCHING FOR PARALLEL
PIPELINE A/D CONVERTERS |
| |
| 2004: HIGH-SPEED PIPELINED
A/D CONVERTER USING TIME-SHIFTED CDS TECHNIQUE |
| |
| 2976: A 115MW 12-BIT 50MSPS
PIPELINED ADC |
| |
| 1326: A PIPELINED A/D
CONVERTER FOR HIGH-SPEED AND HIGH-RESOLUTION
APPLICATION |
| |
| 2809: DESIGN OF LOW-VOLTAGE
CMOS PIPELINED ADC’S USING 1 PICO-JOULE OF ENERGY PER
CONVERSION |
| |
| Top |
| |
Monday, May 27, 1:30 - 3:00:
RF Filter
Systems
|
| |
| 3125: SINGLE-AMPLIFIER
INTEGRATOR-BASED LOW POWER CMOS FILTER FOR VIDEO FREQUENCY
APPLICATIONS |
| |
| 1262: A LOSS CONTROL FEEDBACK
LOOP FOR VCO STABLE AMPLITUDE TUNING OF RF INTEGRATED
FILTERS |
| |
| 2460: COMPLEX LOW-PASS
FILTERS |
| |
| 1706: PROPERTIES OF RF
BANDPASS AMPLIFIER TOPOLOGY WITH Q-ENHANCING |
| |
| 1791: WCDMA CHANNEL SELECTION
FILTER WITH HIGH IIP2 |
| |
| Top |
| |
Monday, May 27, 3:30 - 5:00:
RF Filter
Circuits
|
| |
| 3126: VERY-HIGH-FREQUENCY
LOWPASS FILTER BASED ON A CMOS ACTIVE INDUCTOR |
| |
| 3127: A 10 MHZ ELLIPTIC
LOG-DOMAIN FILTER IN A STANDARD CMOS PROCESS |
| |
| 2817: LOW-POWER LOW-VOLTAGE
CLASS-AB LINEAR OTA FOR HF FILTERS WITH A LARGE TUNING
RANGE |
| |
| 3128: A BUFFER BASED CMOS
BASEBAND CHAIN FOR BLUETOOTH RECEIVER |
| |
| 3124: A CMOS 100MHZ
CONTINUOUS-TIME SEVENTH ORDER 0.05° EQUIRIPPLE LINEAR PHASE
LEAPFROG MULTIPLE LOOP FEEDBACK GM-C FILTER |
| |
| Top |
| |
Tuesday, May 28, 10:30 -
12:00: Integrated
Inductors
|
| |
| 2672: MONOLITHIC MULTI-PHASE
LC-VCO IN ULTRA-THIN SILICON-ON-INSULATOR UTSI®-SOI) CMOS
TECHNOLOGY |
| |
| 1633: MONOLITHIC TRANSFORMERS
IN A FIVE METAL CMOS PROCESS |
| |
| 1407: ANALYSIS AND
APPLICATION OF MINIATURE 3D INDUCTOR |
| |
| 2755: HF LOW NOISE AMPLIFIERS
WITH INTEGRATED TRANSFORMER FEEDBACK |
| |
| 2940: EFFECTS OF SUBSTRATE ON
PHASE-NOISE OF BIPOLAR VOLTAGE-CONTROLLED OSCILLATORS
|
| |
| Top |
| |
Tuesday, May 28, 8:30 -
10:00: Operational
Amplifiers
|
| |
| 2157: A LOW-VOLTAGE LOW-POWER
FAST-SETTLING OPERATIONAL AMPLIFIER FOR USE IN HIGH-SPEED
HIGH-RESOLUTION PIPELINED A/D CONVERTERS |
| |
| 2142: A 1.2V RAIL-TO-RAIL
LOW-POWER OPAMP WITH REPLICA AMPLIFIER GAIN
ENHANCEMENT |
| |
| 2624: A LOW OPEN-LOOP GAIN,
HIGH-PSRR, MICROPOWER CMOS AMPLIFIER FOR MIXED-SIGNAL
APPLICATIONS |
| |
| 1827: A GAIN-ENHANCED
TWO-STAGE FULLY-DIFFERENTIAL CMOS OP AMP WITH HIGH UNITY-GAIN
BANDWIDTH |
| |
| 1098: HIGH EFFICIENCY
BROADBAND LINEAR PUSH-PULL POWER AMPLIFIERS USING LINEARITY
AUGMENTATION |
| |
| Top |
| |
Tuesday, May 28, 8:30 -
10:00: Oscillators
and Phase Locking
|
| |
| 1662: ON JITTER DUE TO DELAY
CELL MISMATCH IN DLL-BASED CLOCK MULTIPLIERS |
| |
| 2660: USE OF A 90 DEGREE
PHASE SHIFT DETECTOR AND SAMPLED-DATA LOOP FILTER IN PLL
|
| |
| 2260: A 5.8-GHZ QUADRATURE
CROSS-COUPLED OSCILLATOR |
| |
| 1168: A LINEARLY-TUNABLE
OTA-C SINUSOIDAL OSCILLATOR FOR LOW-VOLTAGE
APPLICATIONS |
| |
| 1506: AN INDUCTIVE EFFECT IN
CMOS CONVEYORS AND IT'S APPLICATION TO DESIGN OF
LC-OSCILLATORS |
| |
| Top |
| |
Wednesday, May 29, 8:30 -
10:00: Active
Filters
|
| |
| 1620: LOW-SENSITIVITY
ACTIVE-RC HIGH- AND BAND-PASS SECOND -ORDER SALLEN & KEY
ALLPOLE FILTERS |
| |
| 1584: CMOS R-MOSFET-C FOURTH
ORDER BESSEL FILTER WITH ACCURATE GROUP DELAY |
| |
| 1934: A NEW LOW POWER
TRANSCONDUCTOR FOR GM-C FILTERS |
| |
| 2577: TUNEABLE LINEAR
TRANSCONDUCTANCE CELL FOR GM-C FILTER
APPLICATIONS |
| |
| 1140: A HIGH DYNAMIC RANGE
CMOS VARIABLE GAIN FILTER FOR ADSL |
| |
| Top |
| |
Wednesday, May 29, 3:30 -
5:00: Tuning
Circuits II
|
| |
| 1478: FREQUENCY AND Q TUNING
TECHNIQUES FOR CONTINUOUS-TIME BANDPASS SIGMA-DELTA MODULATOR
|
| |
| 2907: AN AUTO-TUNING
STRUCTURE FOR CONTINUOUS TIME SIGMA-DELTA AD CONVERTER AND
HIGH PRECISION FILTERS |
| |
| 1286: DYNAMIC TUNING OF THE
NOISE TRANSFER FUNCTION OF HIGH ORDER DELTA SIGMA ANALOG TO
DIGITAL CONVERTERS |
| |
| 2732: DIGITAL TUNING OF
CONTINUOUS-TIME HIGH-Q FILTERS |
| |
| 1476: AUTOMATIC TUNING OF
HIGH FREQUENCY, HIGH Q, MULTIPLE LOOP FEEDBACK BANDPASS
FILTERS |
| |
| Top |
| |
Wednesday, May 29, 3:30 -
5:00: Sample-and
Hold Circuits
|
| |
| 1588: VERY HIGH-SPEED BJT
BUFFER FOR TRACK-AND-HOLD AMPLIFIERS WITH ENHANCED
LINEARITY |
| |
| 1966: A BIPOLAR 2-GSAMPLE/S
TRACK-AND-HOLD AMPLIFIER (THA) IN 0.35UM SIGE
TECHNOLOGY |
| |
| 1673: A 1 GHZ LINEARIZED CMOS
TRACK-AND-HOLD CIRCUIT |
| |
| 2935: TECHNIQUES TO IMPROVE
LINEARITY OF CMOS SAMPLE-AND-HOLD CIRCUITS FOR ACHIEVING 100DB
PERFORMANCE AT 80 MSPS |
| |
| 1643: A LOW DISTORTION MOS
SAMPLING CIRCUIT |
| |
| Top |
| |
Wednesday, May 29, 1:30 -
3:00: Analog
Computing and Neuromorphic
Circuits
|
| |
| 2783: ON-CHIP SPECTRUM
ANALYZER FOR BUILT-IN TESTING ANALOG ICS |
| |
| 2881: COMPACT CONTINUOUS-TIME
ANALOG RANK-ORDER FILTER IMPLEMENTATION IN CMOS
TECHNOLOGY |
| |
| 2748: AN ALL-ANALOG CMOS
IMPLEMENTATION OF A TURBO DECODER FOR HARD-DISK DRIVE READ
CHANNELS |
| |
| 2794: NEUROMORPHIC NOISE
SHAPING IN COUPLED NEURON POPULATIONS |
| |
| 2991: EMPIRICAL COMPARISON OF
ANALOG AND DIGITAL AUDITORY PREPROCESSING FOR AUTOMATIC SPEECH
RECOGNITION |
| |
| Top |
| |
Wednesday, May 29, 3:30 -
5:00: Analog
Computing and Neuromorphic
Circuits
|
| |
| 2728: CAPACITIVELY-COUPLED
CURRENT CONVEYER SECOND-ORDER SECTION FOR CONTINUOUS-TIME
BANDPASS FILTERING AND COCHLEA MODELING |
| |
| 2960: ACCURATE PROGRAMMING OF
ANALOG FLOATING-GATE ARRAYS |
| |
| 2731: PRACTICAL ISSUES USING
E-POT CIRCUITS |
| |
| 2859: A V_T-ZERO EQUIVALENT
MOSFET AND ITS APPLICATIONS |
| |
| 2581: A LOW-VOLTAGE
FLOATING-GATE CMOS TRANSCONDUCTANCE AMPLIFIER, AND A SPIN-OFF
- QUASI FREQUENCY TRIPLER. |
| |
| Top |
| |
Monday, May 27, 10:30 -
12:00: Transconductance and Low-Voltage Amplifiers
|
| |
| 1567: ANALYSIS AND
OPTIMIZATION OF GAIN-BOOSTED TELESCOPIC
AMPLIFIERS |
| |
| 1116: LOW-VOLTAGE, LOW-POWER
AND HIGH GAIN CMOS OPERATIONAL TRANSCONDUCTANCE
AMPLIFIER |
| |
| 2053: RAIL-TO-RAIL OTA USING
A PAIR OF SINGLE CHANNEL TYPE MOSFETS |
| |
| 2950: A RELIABLE 5V OTA IN
3.3V CMOS TECHNOLOGY |
| |
| 1102: A 1.2 V RAIL-TO-RAIL
DIFFERENTIAL MODE INPUT LINEAR CMOS TRANSCONDUCTOR
|
| |
| Top |
| |
Monday, May 27, 1:30 - 3:00:
Amplifiers,
References and Multipliers
|
| |
| 2403: ALL DIGITAL TRANSISTORS
HIGH GAIN OPERATIONAL AMPLIFIER USING POSITIVE FEEDBACK
TECHNIQUE |
| |
| 2766: NOVEL HIGH PERFORMANCE
CURRENT-FEEDBACK OP-AMP |
| |
| 1346: A CMOS CURRENT FEEDBACK
OPERATIONAL AMPLIFIER WITH ACTIVE CURRENT MODE
COMPENSATION |
| |
| 1626: A TEMPERATURE
INDEPENDENT TRIMMABLE CURRENT SOURCE |
| |
| 2571: TEMPERATURE COMPENSATED
CMOS VOLTAGE REFERENCE |
| |
| Top |
| |
Monday, May 27, 1:30 - 3:00:
Amplifiers,
References and Multipliers
|
| |
| 2970: DETERMINATION OF
VOLTAGE SOURCE VALUES IN MODERN BIASING TECHNIQUES OF ANALOG
CIRCUITS |
| |
| 2628: A LOW-NOISE NONLINEAR
FEEDBACK TECHNIQUE FOR COMPENSATING OFFSET IN ANALOG
MULTIPLIERS |
| |
| 1132: A NEW WIDEBAND BICMOS
FOUR-QUADRANT ANALOG MULTIPLIER |
| |
| 2575: MODIFIED GILBERT
TRANSCONDUCTANCE MULTIPLIER |
| |
| 1145: USEFUL MULTIPLIERS FOR
LOW-VOLTAGE APPLICATIONS |
| |
| Top |
| |
Monday, May 27, 10:30 -
12:00: Transconductance and Low-Voltage Amplifiers
|
| |
| 1612: A HIGH-BANDWIDTH
HIGH-SWING CMOS POWER AMPLIFIER FOR PORTABLE AUDIO
PLAYERS |
| |
| 2889: COMPARISON OF TWO
SCHEMES FOR CONTINUOUS-TIME SUB-VOLT OP-AMP
OPERATION |
| |
| 2475: AN 1V RAIL-RAIL
LOW-POWER CMOS OP-AMP |
| |
| 2613: INVERTING THE BIPOLAR
DIFFERENTIAL PAIR FOR LOW-VOLTAGE APPLICATIONS |
| |
| 1729: A 1.8V LOW VOLTAGE
PSEUDO-DIFFERENTIAL INPUT OPERATIONAL AMPLIFIER |
| |
| Top |
| |
Monday, May 27, 3:30 - 5:00:
Active
Filters
|
| |
| 2911: AREA-EFFICIENT
VOLTAGE-FEEDBACK TYPE CMOS COMPANDING INTEGRATOR |
| |
| 1353: A SIGNAL FLOW GRAPH
BASED DESIGN METHOD FOR SQUARE-ROOT DOMAIN
CIRCUITS |
| |
| 1787: 1V ALL-MOS SIGMA-DELTA
A/D CONVERTERS IN THE LOG-DOMAIN |
| |
| 1355: A SQUARE-ROOT DOMAIN
DIFFERENTIATOR |
| |
| 2869: A 290NW, WEAK
INVERSION, GM-C BIQUAD |
| |
| Top |
| |
Tuesday, May 28, 8:30 -
10:00: Oversampled
Data Conversion
|
| |
| 2266: A 1.1V VERY LOW-POWER
SIGMA-DELTA MODULATOR FOR 14-B 16KHZ A/D CONVERSION USING A
NOVEL CLASS AB TRANSCONDUCTANCE AMPLIFIER |
| |
| 1832: A NEW METHOD TO
INCREASE THE DYNAMIC RANGE OF SWITCHED OPAMP DELTA-SIGMA
MODULATORS |
| |
| 1705: STUDY OF FULLY DIGITAL
ERROR CORRECTION IN MULTIBIT DELTA-SIGMA A/D
CONVERTERS |
| |
| 1857: A NEW APPROACH TO THE
DESIGN OF LOW-SENSITIVITY HIGH-RESOLUTION BANDPASS SIGMA-DELTA
A/D CONVERTERS |
| |
| 1701: ROCFAST: A METHOD OF
SPEEDING UP SIMULATION OF DELTA-SIGMA MODULATORS USING
STATE-SPACE TRACKING |
| |
| Top |
| |
Tuesday, May 28, 8:30 -
10:00: Oversampled
Data Conversion
|
| |
| 1933: A NOVEL WIDEBAND
LOW-DISTORTION CASCADED SIGMA-DELTA ADC |
| |
| 1907: A 3.3-V 18-BIT DIGITAL
AUDIO SIGMA-DELTA MODULATOR IN 0.6-UM CMOS |
| |
| 1497: DESIGN AND
IMPLEMENTATION OF A CONTINUOUS-TIME QUADRATURE BANDPASS
SIGMA-DELTA MODULATOR FOR LOW-IF RADIO RECEIVERS |
| |
| 1442: INFLUENCE OF THE
FEEDBACK DAC DELAY ON A CONTINUOUS-TIME BANDPASS DELTA SIGMA
CONVERTER |
| |
| 1632: IMPLEMENTATION OF A
1.5V LOW-POWER CLOCK-JITTER INSENSITIVE CONTINUOUS-TIME
SIGMA-DELTA MODULATOR |
| |
| Top |
| |
Tuesday, May 28, 10:30 -
12:00: Nyquist Data
Conversion
|
| |
| 3039: THE DESIGN OF
HIGH-SPEED PIPELINED ANALOG-TO-DIGITAL CONVERTERS USING
VOLTAGE-MODE SAMPLING AND CURRENT-MODE PROCESSING
TECHNIQUES |
| |
| 2476: A 10-BIT 100-MS/S 50MW
CMOS A/D CONVERTER |
| |
| 2254: A METHOD FOR THE
ESTIMATION OF APERTURE UNCERTAINTY IN A-D
CONVERTERS |
| |
| 2154: MEASUREMENT
VERIFICATION OF ESTIMATION METHOD FOR TIME ERRORS IN A
TIME-INTERLEAVED A/D CONVERTER SYSTEM |
| |
| 1617: A 10-BIT 150-MS/S,
PARALLEL PIPELINE A/D CONVERTER IN 0.6-UM CMOS |
| |
| Top |
| |
Tuesday, May 28, 10:30 -
12:00: Nyquist Data
Conversion
|
| |
| 1127: A 12B 80MS/S 110MW
FLOATING ANALOG-TO-DIGITAL CONVERTER |
| |
| 1586: A CURRENT STEERING CMOS
FOLDING AMPLIFIER |
| |
| 2028: MATCHING CONSIDERATIONS
IN I/Q A/D CONVERTER PAIRS |
| |
| 2472: FORMULATION OF INL AND
DNL YIELD ESTIMATION IN CURRENT-STEERING D/A
CONVERTERS |
| |
| Top |
| |
Tuesday, May 28, 1:30 - 3:00:
Network Theory and
Linear Systems
|
| |
| 3107: APPLICATION OF THE SD
TO LCTI SYSTEMS: PART 1 |
| |
| 3108: APPLICATION OF THE SD
TO LCTI SYSTEMS: PART 2 |
| |
| 1986: ON INCONSISTENT INITIAL
CONDITIONS FOR LINEAR TIME-INVARIANT DIFFERENTIAL-ALGEBRAIC
EQUATIONS |
| |
| 3106: DERIVATION ALGORITHM OF
TRANSFER FUNCTIONS OF 2-D CONTINUOUS-DISCRETE
SYSTEMS |
| |
| 1195: CUT-OFF FREQUENCIES IN
WIDE-BAND SYSTEMS |
| |
| Top |
| |
Tuesday, May 28, 1:30 - 3:00:
Network Theory and
Linear Systems
|
| |
| 2389: GENERALIZED LC MULTIPLE
RESONANCE NETWORKS |
| |
| 2204: NEW CIRCUITS FOR
REALIZATION OF THE 1ST AND 2ND ORDER ALL-PASS LC FILTERS WITH
A BETTER TECHNOLOGICAL FEASIBILITY |
| |
| 1363: IMMITANCE DATA
MODELLING VIA LINEAR INTERPOLATION TECHNIQUES |
| |
| 2661: COMPUTING THE ELEMENTS
EMBEDDED INTO A POSITIVE FEEDBACK LOOP |
| |
| 1638: AN EFFICIENT BIASING
TECHNIQUE SUITABLE FOR ANY KIND OF THE FOUR BASIC AMPLIFIERS
DESIGNED AT NULLOR LEVEL |
| |
| Top |
| |
Tuesday, May 28, 1:30 - 3:00:
Network Theory and
Linear Systems
|
| |
| 2282: A ROBUST METHOD FOR
EQUALIZER DESIGN BASED ON THE IMPULSE RESPONSE
SYMMETRY |
| |
| 1356: ANALYSIS AND
OPTIMIZATION OF CMOS LNA NOISE PERFORMANCE WITH CHANNEL
RESISTANCE |
| |
| 3098: REVISITING THE SIFTING
INTEGRAL: AN INTERESTING SPECIAL CASE |
| |
| 2683: AN AUTOMATIC TUNING
SCHEME FOR HIGH FREQUENCY BANDPASS FILTERS |
| |
| 2939: CONCEPT OF
FREQUENCY-TRANSCONDUCTANCE TUNING OF BIPOLAR
VOLTAGE-CONTROLLED OSCILLATORS |
| |
| Top |
| |
Tuesday, May 28, 3:30 - 5:00:
RF, Sensors, and
Imagers
|
| |
| 1818: A 50% DUTY-CYCLE
CORRECTION CIRCUIT FOR PLL OUTPUT |
| |
| 2788: BANDWIDTH
CONSIDERATIONS FOR A CALLUM TRANSMITTER
ARCHITECTURE |
| |
| 2675: A 22-MW 435-MHZ
DIFFERENTIAL CMOS HIGH-GAIN LNA FOR SUBSAMPLING
RECEIVERS |
| |
| 2665: A 10-MW 435-MHZ
DIFFERENTIAL CMOS LNA FOR LOW-IF RECEIVERS IN SPACE
APPLICATIONS |
| |
| 1797: A MONOLITHIC LOW POWER
PULSED OPTICAL ENCODER |
| |
| Top |
| |
Tuesday, May 28, 3:30 - 5:00:
RF, Sensors, and
Imagers
|
| |
| 1666: A NEW DETECTOR
ARCHITECTURE FOR OPTICAL PICKUP UNITS IN DVD
SYSTEMS |
| |
| 1814: A ROBUST EDGE DETECTOR
FOR MOTION DETECTION |
| |
| 2138: NEW PIXEL-SHARED DESIGN
AND SPLIT-PATH READOUT OF CMOS IMAGE SENSOR
CIRCUITS |
| |
| 2498: A CMOS IMAGER WITH
PFM/PWM BASED ANALOG-TO-DIGITAL CONVERTER |
| |
| 2258: A DIFFERENTIAL SUMMING
AMPLIFIER FOR ANALOG VLSI SYSTEMS |
| |
| Top |
| |
Wednesday, May 29, 8:30 -
10:00: Active
Filters
|
| |
| 1333: BODY EFFECT COMPENSATED
SWITCH FOR LOW VOLTAGE SWITCHED-CAPACITOR
CIRCUITS |
| |
| 3026: DESIGN AND ANALYSIS OF
LOW TIMING-SKEW CLOCK GENERATION FOR TIME-INTERLEAVED
SAMPLED-DATA SYSTEMS |
| |
| 1970: NOISE ANALYSIS OF
CORRELATED DOUBLE SAMPLING SC-INTEGRATORS |
| |
| 2396: A HIGH Q
SWITCHED-CAPACITOR FILTER WITH REDUCED CAPACITANCE SPREAD
USING A RANDOMIZED NONUNIFORM SAMPLING TECHNIQUE |
| |
| 1301: LOW-POWER COMPLEX
CHANNEL FILTERING USING CASCODED CLASS AB
SWITCHED-CURRENTS |
| |
| Top |
| |
Tuesday, May 28, 8:30 -
10:00: Wireline
Communication Architectures Oral 2
|
| |
| 1846: POWER EFFICIENT
CHIP-TO-CHIP SIGNALING SCHEMES |
| |
| 2929: A HIGH SPEED LOW-NOISE
EQUALIZATION TECHNIQUE WITH IMPROVED BIT ERROR
RATE |
| |
| 3031: A 2GB/S 256*256 CMOS
CROSSBAR SWITCH FABRIC CORE DESIGN USING PIPELINED
MUX |
| |
| 1370: A NON-PLL/DLL DIGITAL
NRZ CLOCK RECOVERY CIRCUIT |
| |
| 2272: FILTER DESIGN FOR
1000BASE-T ANALOG FRONT ENDS |
| |
| Top |
| |
Monday, May 27, 10:30 -
12:00: Wireless
Communication Architectures Oral 1
|
| |
| 1897: A TRACE-BACK-FREE
VITERBI DECODER USING A NEW SURVIVAL PATH MANAGEMENT
ALGORITHM |
| |
| 1949: POWER REDUCTION
TECHNIQUES FOR AN OFDM BURST SYNCHRONIZATION CORE |
| |
| 2030: PARASITIC-AWARE
SYNTHESIS OF RF CMOS SWITCHING POWER AMPLIFIERS |
| |
| 2908: MINIMUM POWER BROADCAST
TREES FOR WIRELESS NETWORKS : OPTIMIZING USING THE VIABILITY
LEMMA |
| |
| 3115: LOW POWER SOVA
ARCHITECTURE USING BI-DIRECTIONAL SCHEME |
| |
| Top |
| |
Tuesday, May 28, 10:30 -
12:00: Communication
RF Circuits Oral 3
|
| |
| 1394: CMOS 2.4-GHZ RECEIVER
FRONT END WITH AREA-EFFICIENT INDUCTORS AND DIGITALLY
CALIBRATED 90-DEGREE DELAY NETWORK |
| |
| 1146: A SUPERREGENERATIVE
RECEIVER FOR PHASE AND FREQUENCY MODULATED
CARRIERS |
| |
| 2470: A 5-GHZ PRESCALER USING
IMPROVED PHASE SWITCHING |
| |
| 1750: A GAIN BOOSTING METHOD
AT RF FREQUENCY USING ACTIVE FEEDBACK AND ITS APPLICATION TO
RF VARIABLE GAIN AMPLIFIER (VGA) |
| |
| Top |
| |
Wednesday, May 29, 8:30 -
10:00: RF VCO
divider Circuits Oral 4
|
| |
| 2438: DESIGN TRADE-OFFS OF A
SYMMETRIC LINEARIZED CMOS LC VCO |
| |
| 2062: A HIGH-PERFORMANCE CMOS
MULTIPHASE VOLTAGE-CONTROLLED OSCILLATOR FOR COMMUNICATION
SYSTEMS |
| |
| 2063: CMOS PHASE-SHIFT VCO
FOR SHORT-RANGE WIRELESS COMMUNICATION |
| |
| 1974: DESIGN OF LOW POWER
2.4GHZ CMOS LC OSCILLATORS WITH LOW PHASE-NOISE AND LARGE
TUNING RANGE |
| |
| 2235: 38 GHZ LOW-POWER STATIC
FREQUENCY DIVIDER IN SIGE BIPOLAR TECHNOLOGY |
| |
| Top |
| |
Wednesday, May 29, 10:30 -
12:00: RF
amplifiers/ mixers Circuits Oral 5
|
| |
| 1896: GAIN AND FREQUENCY
CONTROLLABLE SUB-1 V 5.8 GHZ CMOS LNA |
| |
| 1892: ANALYSIS OF CMOS RF
LNAS WITH ESD PROTECTION |
| |
| 1803: A MONOLITHIC 2.45 GHZ,
0.56 W POWER AMPLIFIER WITH 45% PAE AT 2.4 V IN STANDARD 25
GHZ FT SI-BIPOLAR |
| |
| 1377: A 2GHZ CMOS EVEN
HARMONIC MIXER FOR DIRECT CONVERSION RECEIVERS |
| |
| 1816: GAIN/PHASE IMBALANCE
AND DC OFFSET COMPENSATION IN QUADRATURE
MODULATORS |
| |
| Top |
| |
Tuesday, May 28, 1:30 - 3:00:
Wireless LAN Design
Oral 6
|
| |
| 2377: A MONOLITHIC CMOS VCO
FOR WIRELESS LAN APPLICATIONS |
| |
| 3012: TO LOW COMPLEXITY OFDM
RECEIVER USING LOG-FFT FOR CODED OFDM SYSTEM |
| |
| 2657: DESIGN OF AN EFFICIENT
OFDM BURST SYNCHRONIZATION SCHEME |
| |
| 2727: A NOVEL ADAPTIVE
PRE-DISTORTER USING LS ESTIMATION OF SSPA NON-LINEARITY IN
MOBILE OFDM SYSTEMS |
| |
| 2854: A MIXED-MODE IF GFSK
DEMODULATOR FOR BLUETOOTH |
| |
| Top |
| |
Tuesday, May 28, 3:30 - 5:00:
RF filters Design
and Implementation Oral 7
|
| |
| 2136: A NEW CLASS OF
DUAL-MODE ASYMMETRIC MICROWAVE RECTANGULAR
FILTERS |
| |
| 2198: NOVEL QUASI-ELLIPTIC
MICROSTRIP FILTER CONFIGURATION USING HEXAGONAL OPEN-LOOP
RESONATORS |
| |
| 2550: ON A TRANSMISION-LINE
BUTTERWORTH LOWPASS FILTER USING RADIAL STUBS |
| |
| 2479: NOISE PERFORMANCE OF
CMOS TRANSVERSAL BANDPASS FILTERS |
| |
| 2815: DESIGN OF A SPIRAL-MODE
MICROSTRIP ANTENNA AND MATCHING CIRCUITRY FOR ULTRA-WIDE-BAND
RECEIVERS |
| |
| Top |
| |
Wednesday, May 29, 3:30 -
5:00: Wirelesss LANs
Architectures Oral 8
|
| |
| 1156: VLSI SUITABLE
SYNCHRONIZATION ALGORITHMS AND ARCHITECTURE FOR IEEE 802.11A
PHYSICAL LAYER |
| |
| 1615: MOBILITY SUPPORT FOR
BLUETOOTH PUBLIC ACCESS |
| |
| 1925: AREA-EFFICIENT DIGITAL
BASEBAND MODULE FOR BLUETOOTH WIRELESS
COMMUNICATIONS |
| |
| 2496: AN AREA-EFFICIENT
SYSTOLIC DIVISION CIRCUIT OVER GF(2M) FOR SECURE
COMMUNICATION |
| |
| 1265: LOW-POWER
REGISTER-EXCHANGE VITERBI DECODER FOR HIGH-SPEED WIRELESS
COMMUNICATIONS |
| |
| Top |
| |
Tuesday, May 28, 3:30 - 5:00:
Wireless
Communication Systems Poster 1
|
| |
| 1915: AN ALL -DIGITAL
PROGRAMMABLE DIGITALLY-CONTROLLED-OSCILLATOR (DCO) FOR DIGITAL
WIRELESS APPLICATIONS |
| |
| 2300: FIR FILTERS FOR
COMPENSATING D/A CONVERTER FREQUENCY RESPONSE
DISTORTION |
| |
| 2304: CORRECTION OF
TRANSMITTER GAIN AND PHASE ERRORS AT THE RECEIVER |
| |
| 2735: A DUAL-BAND RF
FRONT-END FOR WCDMA AND GPS APPLICATIONS |
| |
| 1782: RF GAIN CONTROL IN
DIRECT CONVERSION RECEIVERS |
| |
| Top |
| |
Wednesday, May 29, 1:30 -
3:00: Comm Circuits
I Poster 2
|
| |
| 2124: POWER AMPLIFIER ACPR
SIMULATION USING STANDARD HARMONIC BALANCE TOOLS |
| |
| 1119: CLASS AB-D-G LINE
DRIVER FOR CENTRAL OFFICE ASYMMETRIC DIGITAL SUBSCRIBER LINE
SYSTEMS |
| |
| 1248: A LOW-POWER SUBSCRIBER
LINE INTERFACE CIRCUIT IN A HIGH-VOLTAGE CMOS
TECHNOLOGY |
| |
| 1501: AGILE MULTI-BAND
DELTA-SIGMA FREQUENCY SYNTHESIZER ARCHITECTURE |
| |
| 1757: A LOW-COST
POINT-TO-MULTI-POINT ACCESS SYSTEM BASED ON OFDM TRANSMISSION
|
| |
| 2847: DYNAMICS OF
HIGH-FREQUENCY CMOS DIVIDERS |
| |
| Top |
| |
Wednesday, May 29, 1:30 -
3:00: Comm Circuits
II Poster 3
|
| |
| 1727: POWER LINE
COMMUNICATION FRONT-ENDS BASED ON ADSL TECHNOLOGY |
| |
| 1799: A QUADRATURE-MODULATOR
FOR 0.6-2.6GHZ WITH FREQUENCY DOUBLER |
| |
| 1838: A 6 CHANNEL ARRAY OF
5MW, 500MHZ OPTICAL RECEIVERS IN .5UM SOS CMOS |
| |
| 1946: AN IMPROVED ROM
COMPRESSION TECHNIQUE FOR DIRECT DIGITAL FREQUENCY
SYNTHESIZERS |
| |
| 2838: A 2.5-GBIT/S CMOS
OPTICAL RECEIVER FRONTEND |
| |
| Top |
| |
Wednesday, May 29, 1:30 -
3:00: Comm Circuits
III Poster 4
|
| |
| 2723: MMSE MATCHING FOR LOW
NOISE AMPLIFIER |
| |
| 2936: CONCEPT OF
SPECTRUM-SIGNAL TRANSFORMATION |
| |
| 2074: A NOVEL COST-EFFECTIVE
MULTI-PATH ADAPTIVE INTERPOLATED FIR (IFIR)-BASED ECHO
CANCELLER |
| |
| 1937: AN OVERVIEW OF DESIGN
TECHNIQUES FOR CMOS PHASE DETECTORS |
| |
| 2971: APPLICATION OF DIGITAL
FILTER IN SOFTWARE RADIO COMMUNICATION |
| |
| 1640: A CRYSTAL OSCILLATOR
WITH AUTOMATIC AMPLITUDE CONTROL AND DIGITALLY CONTROLLED
PULLING RANGE OF +/- 100PPM |
| |
| Top |
| |
Monday, May 27, 1:30 - 3:00:
VLSI Arithmetic
Circuits
|
| |
| 2199: A 3.3V 1GHZ HIGH SPEED
PIPELINED BOOTH MULTIPLIER |
| |
| 1560: A 1.67 GHZ 32-BIT
PIPELINED CARRY-SELECT ADDER |
| |
| 1269: AN INTERCONNECT
OPTIMIZED FLOORPLANNING OF A SCALAR PRODUCT
MACROCELL |
| |
| 1385: LOW DEPTH CARRY
LOOKAHEAD ADDITION USING CHARGE RECYCLING THRESHOLD
LOGIC |
| |
| 1627: A ROBUST SELF-RESETTING
CMOS 32-BIT PARALLEL ADDER |
| |
| Top |
| |
Monday, May 27, 3:30 - 5:00:
VLSI Arithmetic
Systems
|
| |
| 1517: LOW-VOLTAGE MICROPOWER
ASYNCHRONOUS MULTIPLIER FOR HEARING INSTRUMENTS |
| |
| 1675: LOW COST FLOATING-POINT
UNIT DESIGN FOR AUDIO APPLICATIONS |
| |
| 1854: LOW-VOLTAGE
ASYNCHRONOUS ADDERS FOR LOW POWER AND HIGH SPEED
APPLICATIONS |
| |
| 1830: A NOVEL FLOATING-GATE
MULTIPLE-VALUED CMOS FULL-ADDER |
| |
| 2058: MULTI-VALUED LOGIC
FUNCTION IMPLEMENTATION WITH NOVEL CURRENT-MODE LOGIC
GATES |
| |
| Top |
| |
Tuesday, May 28, 8:30 -
10:00: Cryptograghy
Architectures
|
| |
| 1384: A COMPACT FINITE FIELD
PROCESSOR OVER GF(2^M) FOR ELLIPTIC CURVE
CRYPTOGRAPHY |
| |
| 2793: VLSI ARCHITECTURE OF
BURST MODE ACCELERATION FOR 128-BIT BLOCK CIPHERS |
| |
| 2572: EVALUATION OF DIFFERENT
RIJNDAEL IMPLEMENTATIONS FOR HIGH END SERVERS |
| |
| 2582: A TAMPER RESISTANT
CRYPTO-KEY GENERATION UNIT |
| |
| 2408: VLSI ARCHITECTURE
DESIGN AND IMPLEMENTATION FOR TWOFISH BLOCK
CIPHER |
| |
| Top |
| |
Monday, May 27, 10:30 -
12:00: VLSI
Arithmetic Architectures
|
| |
| 1635: THE USE OF REDUCED
2'S-COMPLEMENT REPRESENTATION IN LOW-POWER DSP
DESIGN |
| |
| 2372: DESIGN OF LOW ERROR CSD
FIXED-WIDTH MULTIPLIER |
| |
| 2546: EXTENDED RESULTS FOR
MINIMUM-ADDER CONSTANT INTEGER MULTIPLIERS |
| |
| 1689: A GENERALIZED
METHODOLOGY FOR LOWER-ERROR AREA-EFFICIENT FIXED-WIDTH
MULTIPLIERS |
| |
| 1694: A CARRY-SELECT-ADDER
OPTIMIZATION TECHNIQUE FOR HIGH-PERFORMANCE BOOTH-ENCODED
WALLACE-TREE MULTIPLIERS |
| |
| Top |
| |
Tuesday, May 28, 10:30 -
12:00: Logarithmic
and Residue Arithmetic
|
| |
| 2826: OPTIMIZATION OF LNS
OPERATIONS FOR EMBEDDED SIGNAL PROCESSING
APPLICATIONS |
| |
| 2523: LOW POWER CONVOLVERS
USING THE POLYNOMIAL RESIDUE NUMBER SYSTEM |
| |
| 2516: IMPROVED
COTRANSFORMATION FOR LNS SUBTRACTION |
| |
| 2763: RESIDUE NUMBER SYSTEM
RECONFIGURABLE DATAPATH |
| |
| 2450: A 2-DIGIT
MULTIDIMENSIONAL LOGARITHMIC NUMBER SYSTEM FILTERBANK FOR A
DIGITAL HEARING AID ARCHITECTURE |
| |
| Top |
| |
Tuesday, May 28, 1:30 - 3:00:
VLSI Circuits
Styles
|
| |
| 1192: PSEUDO DYNAMIC LOGIC
(SDL): A HIGH-SPEED AND LOW-POWER DYNAMIC LOGIC
FAMILY |
| |
| 1466: POWER-DELAY TRADE-OFFS
IN SCL GATES |
| |
| 2744: CMOS BULK INPUT
TECHNIQUE |
| |
| 1193: COMPARISON OF A 17B
MULTIPLIER IN DUAL-RAIL DOMINO AND IN DUAL-RAIL D3L (D4L)
LOGIC STYLES |
| |
| 2668: A CRITICAL LOOK AT
DESIGN GUIDELINES FOR SOI LOGIC GATES |
| |
| Top |
| |
Tuesday, May 28, 3:30 - 5:00:
VLSI
Circuits
|
| |
| 1877: AN AREA-EFFICIENT CMOS
BAND-GAP REFERENCE CIRCUIT FOR LOW SUPPLY
VOLTAGES |
| |
| 1993: CMOS VOLTAGE INTERFACE
CIRCUIT FOR LOW POWER SYSTEMS |
| |
| 2419: LOW POWER CLOCK
GENERATOR BASED ON AN AREA-REDUCED INTERLEAVED SYNCHRONOUS
MIRROR DELAY SCHEME |
| |
| 1434: A WIDE-RANGE AND FIXED
LATENCY OF ONE CLOCK CYCLE DELAY-LOCK LOOPED LOOP
|
| |
| 1185: AN ALL-DIGITAL
PHASE-LOCKED LOOP FOR HIGH-SPEED CLOCK GENERATION |
| |
| Top |
| |
Wednesday, May 29, 10:30 -
12:00: Memory
Circuits
|
| |
| 1614: LOW POWER VOLTAGE
REGULATOR FOR EPROM APPLICATIONS |
| |
| 2777: FULL CURRENT-MODE
TECHNIQUES FOR LOW-POWER AND HIGH-SPEED CMOS
SRAMS |
| |
| 1392: 0.8V CMOS
CONTENT-ADDRESSABLE-MEMORY (CAM) CELL WITH A FAST TAG-COMPARE
CAPABILITY USING BULK PMOS DYNAMIC-THRESHOLD (BP-DTMOS)
TECHNIQUE BASED ON STANDARD CMOS TECHNOLOGY FOR LOW-VOLTAGE
VLSI |
| |
| 2054: INPUT ISOLATED SENSE
AMPLIFIERS |
| |
| 2046: LOW-POWER 2P2N SRAM
WITH COLUMN HIDDEN REFRESH |
| |
| Top |
| |
Wednesday, May 29, 1:30 -
3:00: VLSI
Circuits
|
| |
| 1504: A NOVEL DOUBLE
EDGE-TRIGGERED PULSE-CLOCKED TSPC D FLIP-FLOP FOR
HIGH-PERFORMANCE AND LOW-POWER VLSI DESIGN
APPLICATIONS |
| |
| 2629: COMPARATIVE ANALYSIS OF
DOUBLE-EDGE VERSUS SINGLE-EDGE TRIGGERED CLOCKED STORAGE
ELEMENTS |
| |
| 1080: SIMPLIFIED CURRENT AND
DELAY MODELS FOR DEEP SUBMICRON CMOS DIGITAL
CIRCUITS |
| |
| 1222: SELF-TIMED MOS CURRENT
MODE LOGIC FOR DIGITAL APPLICATIONS |
| |
| 1778: CURRENT-SENSING
COMPLETION DETECTION METHOD FOR STANDARD CELL BASED DIGITAL
SYSTEM DESIGN |
| |
| Top |
| |
Monday, May 27, 10:30 -
12:00: System Level
Issues
|
| |
| 3080: MAXIMUM ACHIEVABLE
ENERGY REDUCTION USING CODING WITH APPLICATIONS TO DEEP
SUB-MICRON BUSES |
| |
| 1388: A NOVEL ANALYSIS METHOD
OF BUS SIGNAL TRANSMISSION AND A PROPOSAL FOR HIGH-SPEED
LOW-POWER BUS CIRCUIT |
| |
| 2448: ENERGY-EFFICIENT AND
RELIABLE LOW-SWING SIGNALING FOR ON-CHIP BUSES BASED ON
REDUNDANT CODING |
| |
| 2983: ON DYNAMIC DELAY AND
REPEATER INSERTION |
| |
| 2612:
INDUCTANCE/AREA/RESISTANCE TRADEOFFS IN HIGH PERFORMANCE POWER
DISTRIBUTION GRIDS |
| |
| Top |
| |
Wednesday, May 29, 8:30 -
10:00: Low-Noise
Circuits and Interconect Issues
|
| |
| 1969: A LOW-VOLTAGE LOW-NOISE
DIGITAL BUFFER SYSTEM |
| |
| 2893: A NEW TECHNIQUE FOR
NOISE-TOLERANT PIPELINED DYNAMIC DIGITAL CIRCUITS |
| |
| 1393: NOVEL MACROMODELING FOR
ON-CHIP RC/RLC INTERCONNECTS |
| |
| 1789: OPTIMISING BANDWIDTH
OVER DEEP SUB-MICRON INTERCONNECT |
| |
| 2474: PERFORMANCE ANALYSIS OF
DEEP SUB MICRON VLSI CIRCUITS IN THE PRESENCE OF SELF AND
MUTUAL INDUCTANCE |
| |
| Top |
| |
Monday, May 27, 1:30 - 3:00:
Low-Power VLSI
Systems
|
| |
| 1740: GATE-DIFFUSION INPUT
(GDI) – A TECHNIQUE FOR LOW POWER DESIGN OF DIGITAL CIRCUITS:
ANALYSIS AND CHARACTERIZATION |
| |
| 3032: ARCHITECTURAL
APPROACHES TO REDUCE LEAKAGE ENERGY IN CACHES |
| |
| 1516: OPTIMIZING FINITE STATE
MACHINES FOR SYSTEM-ON-CHIP COMMUNICATION |
| |
| 1975: TWO-DIMENSIONAL SIGNAL
GATING FOR LOW-POWER ARRAY MULTIPLIER DESIGN |
| |
| 2611: LOW-POWER METHODOLOGY
ISSUES IN DIGITAL CIRCUIT DESIGN |
| |
| Top |
| |
Monday, May 27, 3:30 - 5:00:
Channel Coding
Architectures
|
| |
| 1364: FAST SOFT-OUTPUT
VITERBI DECODING FOR DUO-BINARY TURBO CODES |
| |
| 1684: HIGH-SPEED
ADD-COMPARE-SELECT UNITS USING LOCALLY SELF-RESETTING
CMOS |
| |
| 1445: A RECONFIGUREABLE
SUPERIMPOSED 2D-MESH ARRAY FOR CHANNEL
EQUALIZATION |
| |
| 1668: ENABLING HIGH-SPEED
TURBO-DECODING THROUGH CONCURRENT INTERLEAVING |
| |
| 1834: HIGH SPEED VLSI
ARCHITECTURE DESIGN FOR BLOCK TURBO DECODER |
| |
| Top |
| |
Tuesday, May 28, 8:30 -
10:00: System-on-Chip
Methodologies
|
| |
| 2118: A HIERARCHICAL
INTERFACE DESIGN METHODOLOGY AND MODELS FOR SOC IP
INTEGRATION |
| |
| 2155: DESIGN SPACE
EXPLORATION METHODOLOGIES FOR IP-BASED
SYSTEM-ON-A-CHIP |
| |
| 2257: OBJECT-ORIENTED DESIGN
METHODOLOGY APPLIED TO THE MODELING OF USB DEVICE AND BUS
INTERFACE LAYERS |
| |
| 2391: A SOLUTION TO THE
CRITICAL RACE PROBLEM AND RESULTING VLSI CIRCUITS |
| |
| 2808: OVERVIEW OF BUS-BASED
SYSTEM-ON-CHIP INTERCONNECTIONS |
| |
| Top |
| |
Wednesday, May 29, 3:30 -
5:00: ESD and DSM
Issues
|
| |
| 1723: ON-CHIP ESD PROTECTION
CIRCUIT DESIGN WITH NOVEL SUBSTRATE-TRIGGERED SCR DEVICE IN
SUB-QUARTER-MICRON CMOS PROCESS |
| |
| 1876: ESD PROTECTION CIRCUITS
WITH NOVEL MOS-BOUNDED DIODE STRUCTURES |
| |
| 2179: LATCHUP CURRENT
SELF-STOP CIRCUIT FOR WHOLE-CHIP LATCHUP PREVENTION IN BULK
CMOS INTEGRATED CIRCUITS |
| |
| 1444: MODIFIED LONG CHANNEL
MODEL FOR ANALYTICAL STUDY OF DSM CIRCUITS |
| |
| 2522: CMOS CHARGE PUMPS USING
CROSS-COUPLED CHARGE TRANSFER SWITCHES WITH IMPROVED VOLTAGE
PUMPING GAIN AND LOW GATE-OXIDE STRESS FOR LOW-VOLTAGE MEMORY
CIRCUITS |
| |
| Top |
| |
Tuesday, May 28, 10:30 -
12:00: High-Speed
VLSI Circuits
|
| |
| 2297: 3.3 GHZ SENSE-AMPLIFIER
IN 0.18 UM CMOS TECHNOLOGY |
| |
| 2357: 1.1-GDI/S TRANSMISSION
BETWEEN PAUSIBLE CLOCK DOMAINS |
| |
| 1141: A 6.4 GBPS FIFO DESIGN
FOR 8-32 TWO-WAY DATA EXCHANGE BUS |
| |
| 1187: EFFICIENT IP ROUTING
TABLE VSLI DESIGN FOR MULTIGIGABIT ROUTERS |
| |
| 1225: THE IMPACT OF DEVICE
LEAKAGE ON DIGITAL CIRCUITS |
| |
| Top |
| |
Tuesday, May 28, 1:30 - 3:00:
Wireless
Architectures
|
| |
| 2736: HANDSET DETECTOR
ARCHITECTURES FOR DS-CDMA WIRELESS SYSTEMS |
| |
| 2916: VLSI ARCHITECTURE OF
DIGITAL MATCHED FILTER AND PRIME INTERLEAVER FOR
W-CDMA |
| |
| 2941: A VLSI ARCHITECTURE OF
A K-BEST LATTICE DECODING ALGORITHM FOR MIMO CHANNELS
|
| |
| 2309: FPGA-BASED RADIX-4
BUTTERFLIES FOR HIPERLAN/2 |
| |
| 2527: A HIGH-SPEED FFT
PROCESSOR FOR OFDM SYSTEMS |
| |
| Top |
| |
Tuesday, May 28, 3:30 - 5:00:
Imaging
Architectures
|
| |
| 2674: A PIPELINED TEMPORAL
DIFFERENCE IMAGER |
| |
| 2806: PIXEL-AND-COLUMN
PIPELINE ARCHITECTURE FOR FFT-BASED IMAGE
PROCESSOR |
| |
| 2890: ARCHITECTURE FOR AN
AVLSI STEREO VISION SYSTEM |
| |
| 1991: AN ARBITRATION LOGIC
FOR CIF 30F/S BI-DIRECTIONAL CODEC WITH GRAPHIC
ACCELERATOR |
| |
| 2095: A HIGHLY INTEGRATED
CMOS IMAGE SENSOR ARCHITECTURE FOR LOW VOLTAGE APPLICATIONS
WITH DEEP SUBMICRON PROCESS |
| |
| Top |
| |
Wednesday, May 29, 8:30 -
10:00: VLSI Signal
Processing Architectures
|
| |
| 2027: AN EFFICIENT MODIFIED
PHONG SHADING ALGORITHM & ITS LOW-COMPLEXITY
REALIZATION |
| |
| 2895: A RING-PROCESSOR BASED
BLIND BEAMFORMER DESIGN FOR USE IN WIRELESS SENSOR
NETWORKS |
| |
| 1900: A SCALABLE SORTING
ARCHITECTURE BASED ON MASKABLE WTA/MAX CIRCUIT |
| |
| 2069: A NEW PIPELINED
ADAPTIVE DFE ARCHITECTURE WITH IMPROVED CONVERGENCE
RATE |
| |
| 1904: DESIGN OF A PIPELINED
AND EXPANDABLE SORTING ARCHITECTURE WITH SIMPLE CONTROL
SCHEME |
| |
| Top |
| |
Wednesday, May 29, 10:30 -
12:00: VLSI
Networks
|
| |
| 1380: MUTUAL RELATIONS AND
PROPERTIES OF SYMMETRIC FUNCTIONS IN WALSH SPECTRAL
DOMAIN |
| |
| 2108: SIMPLIFIED REED-MULLER
EXPRESSIONS FOR RESIDUE THRESHOLD FUNCTIONS |
| |
| 3117: VLSI REALIZATION OF
FOUR-PORT EAR-TYPE TRANSMISSION LATTICE FILTER |
| |
| 1718: SIMPLE PARALLEL
WEIGHTED ORDER STATISTIC FILTER IMPLEMENTATIONS |
| |
| 2140: A STUDY OF ROBUSTNESS
AND COUPLING-NOISE IMMUNITY ON SIMULTANEOUS DATA TRANSFER CDMA
BUS INTERFACE |
| |
| Top |
| |
Wednesday, May 29, 1:30 -
3:00: Video
Architectures
|
| |
| 1256: A NOVEL DCT-BASED BIT
PLANE ERROR RESILIENT ENTROPY CODING SCHEME AND CODEC FOR
WIRELESS IMAGE COMMUNICATION |
| |
| 1470: MODULAR AND EFFICIENT
ARCHITECTURE FOR H.263 VIDEO CODEC VLSI |
| |
| 2192: A SINGLE-CHIP REAL-TIME
PROGRAMMABLE VIDEO SIGNAL PROCESSOR |
| |
| 1297: HIGH-SPEED
MEMORY-SAVING ARCHITECTURE FOR THE EMBEDDED BLOCK CODING IN
JPEG2000 |
| |
| 2540: AN
ASSOCIATIVE-PROCESSOR-BASED MIXED SIGNAL SYSTEM FOR ROBUST
GRAYSCALE IMAGE RECOGNITION |
| |
| Top |
| |
Wednesday, May 29, 3:30 -
5:00: VLSI
Architectures
|
| |
| 1436: A NEW HARDWARE
EFFICIENT DESIGN FOR THE ONE DIMENSIONAL DISCRETE FOURIER
TRANSFORM |
| |
| 1808: A FULLY PROGRAMMABLE
REED SOLOMON 8-BIT CODEC BASED ON A RE-SHAPED BERLEKAMP MASSEY
ALGORITHM |
| |
| 1952: MEMORY ARRANGEMENTS IN
TURBO DECODERS USING SLIDING-WINDOW BCJR
ALGORITHM |
| |
| 2526: DESIGN OF NEW DSP
INSTRUCTIONS AND THEIR HARDWARE ARCHITECTURE FOR THE VITERBI
DECODING ALGORITHM |
| |
| 2587: EFFICIENT VLSI
ARCHITECTURES OF LIFTING-BASED DISCRETE WAVELET TRANSFORM BY
SYSTEMATIC DESIGN METHOD |
| |
| Top |
| |
Wednesday, May 29, 3:30 -
5:00: Finite Field
and Reed-Solomon Architectures
|
| |
| 1886: EFFICIENT DIGIT-SERIAL
NORMAL BASIS MULTIPLIERS OVER GF(2/SUP M/) |
| |
| 1406: LOW POWER FINITE FIELD
MULTIPLICATION AND DIVISION IN RE-CONFIGURABLE REED-SOLOMON
CODEC |
| |
| 2832: SYSTOLIC ARCHITECTURES
FOR FINITE FIELD INVERSION AND DIVISION |
| |
| 2535: DESIGN OF A HIGH-SPEED
REED-SOLOMON DECODER |
| |
| Top |
| |
Tuesday, May 28, 1:30 - 3:00:
VLSI
Arithmetic
|
| |
| 1526: PERFORMANCE ANALYSIS OF
SINGLE-BIT FULL ADDER CELLS USING 0.18, 0.25, AND 0.35 UM CMOS
TECHNOLOGIES |
| |
| 2415: A RADIX-2N VECTOR INNER
PRODUCT |
| |
| 3085: A UNIFIED RADIX-4
PARTIAL-PRODUCT GENERATOR FOR INTEGERS AND BINARY
POLYNOMIALS |
| |
| 2342: A POLYNOMIAL-BASED
DIVISION ALGORITHM |
| |
| 3038: SUB-WORD AND
REDUCED-WIDTH BOOTH MULTIPLIERS FOR DSP
APPLICATIONS |
| |
| 3073: NOISE-TOLERANT DESIGN
AND ANALYSIS FOR A LOW-VOLTAGE DYNAMIC FULL ADDER
CELL |
| |
| Top |
| |
Wednesday, May 29, 3:30 -
5:00: Configurable
Systems
|
| |
| 2221: TRADEOFF ANALYSIS OF
FPGA BASED ELLIPTIC CURVE CRYPTOGRAPHY |
| |
| 3066: POWER CHARACTERIZATION
OF DIGITAL FILTERS IMPLEMENTED ON FPGA |
| |
| 2825: EFFICIENT ARCHITECTURE
FOR FPGA-BASED MICROCONTROLLERS |
| |
| 1731: A POWER-CONFIGURABLE
BUS FOR EMBEDDED SYSTEMS |
| |
| 1645: A NEW ARCHITECTURE OF
RRNS ERROR-CORRECTING QC ENCODER/DECODER AND ITS FPGA
IMPLEMENTATION |
| |
| Top |
| |
Wednesday, May 29, 1:30 -
3:00: Floating-Gate
Circuits
|
| |
| 1469: A RECONFIGURABLE LOGIC
CIRCUIT BASED ON THRESHOLD ELEMENTS WITH A CONTROLLED FLOATING
GATE |
| |
| 1835: {NOVEL FLOATING-GATE
MULTIPLE-VALUED SIGNAL TO BINARY SIGNAL CONVERTERS FOR
MULTIPLE-VALUED CMOS LOGI |
| |
| 2957: HIGH-SPEED LOW-POWER
LOGIC GATES USING FLOATING GATES |
| |
| 2997: COMPACT LOW-VOLTAGE
SELF-CALIBRATING DIGITAL FLOATING-GATE CMOS LOGIC
CIRCUITS |
| |
| 2583: A LOW-VOLTAGE SINC2
DECIMATOR IMPLEMENTED BY A NEWCIRCUIT TECHNIQUE USING
FLOATING-GATE MOS TRANSISTORS |
| |
| Top |
| |
Tuesday, May 28, 3:30 - 5:00:
Low-Power
Methodologies
|
| |
| 1295: INSTRUCTION BUFFERING
FOR NESTED LOOPS IN LOW POWER DESIGN |
| |
| 1565: EVALUATION ON POWER
REDUCTION APPLYING GATED CLOCK APPROACHES |
| |
| 1936: LOW POWER REGISTER FILE
ARCHITECTURE FOR APPLICATION SPECIFIC DSPS |
| |
| 2417: LOW-POWER MULTIPLIERS
BY MINIMIZING SWITCHING ACTIVITIES OF PARTIAL
PRODUCTS |
| |
| 2568: A NOVEL LIST-
SCHEDULING ALGORITHM FOR THE LOW-ENERGY PROGRAM
EXECUTION |
| |
| Top |
| |
Wednesday, May 29, 10:30 -
12:00: VLSI
Implementations
|
| |
| 1754: CASCADE ¡V CONFIGURABLE
AND SCALABLE DSP ENVIRONMENT |
| |
| 2994: REGISTER-BASED
REORDERING NETWORKS FOR MATRIX TRANSPOSE |
| |
| 2209: HARDWARE IMPLEMENTATION
OF THE SAFER+ ENCRYPTION ALGORITHM FOR THE BLUETOOTH
SYSTEM |
| |
| 2992: VLSI ARCHITECTURES FOR
THE IMPLEMENTATION OF THE WIGNER DISTRIBUTION |
| |
| 1331: ARCHITECTURAL SUPPORT
FOR DETECTION OF SLEEPY EYE BEHAVIOR |
| |
| Top |
| |
Wednesday, May 29, 10:30 -
12:00: VLSI
Implementations
|
| |
| 1669: A COEFFICIENT MEMORY
ADDRESSING SCHEME FOR VLSI IMPLEMENTATION OF FFT
PROCESSORS |
| |
| 1815: RANDOM NUMBER GENERATOR
ARCHITECTURE AND VLSI IMPLEMETATION |
| |
| 1960: THE TWO-PHASE
TWISTED-RING COUNTER CIRCUIT |
| |
| 3095: A HIERARCHY OF PHYSICAL
DESIGN WATERMARKING SCHEMES FOR INTELLECTUAL PROPERTY
PROTECTION OF IC DESIGNS |
| |
| 2275: AN ADAPTIVE DATA
COMPRESSION SCHEME FOR MEMORY TRAFFIC MINIMIZATION IN
PROCESSOR-BASED SYSTEMS |
| |
| Top |
| |
Wednesday, May 29, 8:30 -
10:00: Testing,Error
and Fault Tolerances
|
| |
| 2996: INTERCONNECTION OF
AUTONOMOUS ERROR-TOLERANT CELLS |
| |
| 3058: A SELF-CHECKING CELL
LOGIC BLOCK FOR FAULT TOLERANT FPGAS |
| |
| 1847: CELL LIBRARY FOR
AUTOMATIC SYNTHESIS OF ANALOG ERROR CONTROL
DECODERS |
| |
| 2623: INTERCONNECT PEAK
CURRENT REDUCTION FOR WAVELET ARRAY PROCESSOR USING SELF-TIMED
SIGNALING |
| |
| Top |
| |
Wednesday, May 29, 1:30 -
3:00: Communications
Circuits
|
| |
| 1307: HARDWARE OPTIMIZED
DIRECT DIGITAL FREQUENCY SYNTHESIZER ARCHITECTURE WITH 60 DBC
SPECTRAL PURITY |
| |
| 1343: A 1.2 V 900 MHZ CMOS
MIXER |
| |
| 1711: OPTIMIZED
FPGA-IMPLEMENTATION OF QUADRATURE DDS |
| |
| 1995: A HIGH SPEED DIRECT
DIGITAL FREQUENCY SYNTHESIZER USING A LOW POWER PIPELINED
PARALLEL ACCUMULATOR |
| |
| 2692: A 3.4-MW 128-MHZ ANALOG
CORRELATOR FOR DS-CDMA WIRELESS APPLICATIONS |
| |
| Top |
| |
Tuesday, May 28, 10:30 -
12:00: floorplanning
and placement
|
| |
| 1291: A STANDARD-CELL
PLACMENT ALGORITHMOF OPTIMIZING MULTIPLE OBJECTS |
| |
| 2481: MODULE PLACEMENT WITH
BOUNDARY CONSTRAINTS USING O-TREE REPRESENTATION |
| |
| 2917: BUS-BASED INTEGRATED
FLOORPLANNING |
| |
| 1431: AN EFFICIENT GENETIC
ALGORITHM FOR SLICING FLOORPLAN AREA OPTIMIZATION |
| |
| 1423: INCREMENTAL PLACEMENT
ALGORITHM FOR STANDARD-CELL LAYOUT |
| |
| Top |
| |
Monday, May 27, 1:30 - 3:00:
analog
modeling
|
| |
| 2128: FLOATING-GATE EEPROM
CELL: THRESHOLD VOLTAGE SENSIBILITY TO GEOMETRY |
| |
| 2213: ANALYSIS OF POWER
SUPPLY NOISE ATTENUATION IN A PTAT CURRENT SOURCE |
| |
| 2884: TOLERANCE ANALYSIS FOR
ELECTRONIC CIRCUIT DESIGN USING THE METHOD OF
MOMENTS |
| |
| 2359: MODELING HOT-ELECTRONS
EFFECTS IN SILICON-ON-SAPPHIRE MOSFETS |
| |
| 2292: A NEURAL NETWORK
APPROACH TO PREDICT THE CROSSTALK IN NONUNIFORM MULTICONDUCTOR
TRANSMISSION LINES |
| |
| Top |
| |
Monday, May 27, 10:30 -
12:00: interconnect
modeling and optimization
|
| |
| 1337: A NOVEL AND EFFICIENT
TIMING-DRIVEN GLOBAL ROUTER FOR STANDARD CELL LAYOUT DESIGN
BASED ON CRITICAL NETWORK CONCEPT |
| |
| 2007: ON SEGMENTED CHANNEL
ROUTABILITY |
| |
| 1486: GATED DIRECT SEQUENCE
SPREAD SPECTRUM CLOCKING SCHEME FOR MULTIMEDIA
SYSTEMS |
| |
| 1474: WAVELET METHOD FOR
HIGH-SPEED CLOCK TREE SIMULATION |
| |
| 2298: DESIGN FLOW OF ROBUST
ROUTED POWER DISTRIBUTION FOR LOW POWER ASIC |
| |
| Top |
| |
Wednesday, May 29, 8:30 -
10:00: Power
Optimization and circuit
simulation
|
| |
| 2433: DESIGN REWIRING FOR
POWER MINIMIZATION |
| |
| 1976: ENERGY DISSIPATION
MODELING OF LOSSY TRANSMISSION LINES DRIVEN BY CMOS
INVERTERS |
| |
| 2606: CONFRONTING VIOLATIONS
OF THE TSCG(T) IN LOW-POWER DESIGN |
| |
| 2454: ITERATIVE SOLUTION OF
ODE-PDE-AE SYSTEMS FOR RF CIRCUIT SIMULATION |
| |
| 1078: AN EFFICIENT LOW-POWER
BINDING ALGORITHM IN HIGH-LEVEL SYNTHESIS |
| |
| Top |
| |
Wednesday, May 29, 10:30 -
12:00: high level
synthesis
|
| |
| 1282: TASK GRAPH
TRANSFORMATION TO AID SYSTEM SYNTHESIS |
| |
| 2722: BEHAVIORAL SYNTHESIS OF
DATAPATHS WITH LOW LEAKAGE POWER |
| |
| 2807: HEURISTIC
ASSIGNMENT-DRIVEN SCHEDULING FOR DATA-PATH
SYNTHESIS |
| |
| 3072: OPTIMAL CIRCUIT
CLUSTERING WITH VARIABLE INTERCONNECT DELAY |
| |
| 2243: A DESIGN METHODOLOGY
FOR IP INTEGRATION |
| |
| Top |
| |
Wednesday, May 29, 1:30 -
3:00: mixed signal
circuit and device modeling
|
| |
| 1844: A SCALABLE BSIM3V3 RF
MODEL FOR MULTI-FINGER NMOSFETS WITH RING SUBSTRATE
CONTACT |
| |
| 2885: THEORY AND ALGORITHMS
FOR RF SENSITIVITY COMPUTATION |
| |
| 1152: ROBUST DESIGN WITH
VIRTUAL TESTS OF MIXED-SIGNAL CIRCUITS IN
VHDL-AMS |
| |
| 2429: AN EFFICIENT PARAMETER
EXTRACTION METHOD USING STATISTICAL OPTIMIZATION IN S-CMOS
DEEP-SUBMICRON/NANOMETER MODEL |
| |
| 1487: AN EFFICIENT MODELING
APPROACH FOR SUBSTRATE NOISE COUPLING ANALYSIS |
| |
| Top |
| |
Monday, May 27, 3:30 - 5:00:
analog synthesis and
optimization
|
| |
| 2185: FAST EXPLORATION OF
DELTASIGMA ADC DESIGN SPACE |
| |
| 2082: AUTOMATED DESIGN OF
ANALOG COMPUTATIONAL CIRCUITS USING CELL-BASED
STRUCTURE |
| |
| 1590: CONTINUOUS-SPECTRUM
FREQUENCY-DOMAIN SIMULATION OF NONLINEAR SYSTEMS |
| |
| 2075: GENERATION OF
TECHNOLOGY-PORTABLE FLEXIBLE ANALOG BLOCKS |
| |
| 2259: EVOLUTION BASED
AUTOMATIC SYNTHESIS OF ANALOG INTEGRATED CIRCUITS |
| |
| Top |
| |
Tuesday, May 28, 8:30 -
10:00: power
estimation
|
| |
| 1591: ESTIMATING THE POWER
DISSIPATION RANGE IN SWITCHED-CAPACITOR CIRCUITS |
| |
| 1448: AN ENERGY SIMULATION
FRAMEWORK FOR AN EMBEDDED OPERATING SYSTEM |
| |
| 2797: TRANSITION ACTIVITY
ESTIMATION FOR GENERIC DATA DISTRIBUTIONS |
| |
| 1972: VECTOR COMPACTION FOR
POWER ESTIMATION WITH GROUPING AND CONSECUTIVE SAMPLING
TECHNIQUES |
| |
| 1546: POWER ESTIMATION AT
ARCHITECTURE LEVEL FOR EMBEDDED SYSTEMS |
| |
| Top |
| |
Tuesday, May 28, 1:30 - 3:00:
Digital Circuits
Synthesis & Optimization
|
| |
| 1702: PHYSICAL SYNTHESIS FOR
ASIC DATAPATH CIRCUITS |
| |
| 2630: ASYNCHRONOUS CIRCUIT
SYNTHESIS VIA DIRECT TRANSLATION |
| |
| 2796: LOGIC SYNTHESIS FOR PLA
WITH 2-INPUT LOGIC ELEMENTS |
| |
| 1251: POLYNOMIAL EXPANSIONS
OVER GF(2) BASED ON FASTEST TRANSFORMATION |
| |
| 1542: CIRCUIT DESIGN FROM
MINIMIZED HAAR WAVELET SERIES |
| |
| Top |
| |
Tuesday, May 28, 3:30 - 5:00:
device and
interconnect modeling
|
| |
| 1733: POTENTIAL/CHARGE
BALANCE MODEL FOR A FLOATING GATE EEPROM CELL |
| |
| 2784: INDUCTANCE MODELING FOR
ON-CHIP INTERCONNECTS |
| |
| 2836: A TICK BASED
METHODOLOGY FOR RAPID PREDICTIVE CIRCUIT MODELING |
| |
| 2452: PASSIVE CLOSED-FORM
EXPRESSION OF RLCG TRANSMISSION LINES |
| |
| 2135: FLOATING-GATE EEPROM
CELL MODEL BASED ON MOS MODEL 9 |
| |
| Top |
| |
Wednesday, May 29, 3:30 -
5:00: noise modeling
and minimization
|
| |
| 1443: CROSSTALK NOISE
ESTIMATION USING EFFECTIVE COUPLING CAPACITANCE |
| |
| 1795: NOISE SIMULATION
TECHNIQUE FOR MIXED FREQUENCY-TIME APPROACH |
| |
| 2033: NOISE ANALYSIS OF
POWER/GROUND PLANES ON PCB BY SPICE-LIKE SIMULATOR WITH MODEL
ORDER REDUCTION TECHNIQUE |
| |
| 2332: EVALUATING NOISE PULSES
IN RC NETWORKS DUE TO CAPACITIVE COUPLING |
| |
| 1170: ANALYSIS OF CLOCK
BUFFER PHASE NOISE |
| |
| Top |
| |
Wednesday, May 29, 3:30 -
5:00: embedded
system synthesis and optimization
|
| |
| 2147: 3D SCHEDULING BASED ON
CODE SPACE EXPLORATION FOR DYNAMICALLY RECONFIGURABLE
SYSTEMS |
| |
| 2837: PERFORMANCE
OPTIMIZATION OF MULTIPLE MEMORY ARCHITECTURES FOR
DSP |
| |
| 3092: AN APPLICATION LEVEL
SYNTHESIS METHODOLOGY FOR EMBEDDED SYSTEMS |
| |
| 2782: A DISCRETE ALGORITHM
FOR THE REGULARIZATION OF HIERARCHICAL VHDL-AMS
MODELS |
| |
| 1418: ADDRESS CODE
OPTIMIZATION USING CODE SCHEDULING FOR DIGITAL SIGNAL
PROCESSORS |
| |
| Top |
| |
Monday, May 27, 1:30 - 3:00:
testing
|
| |
| 1685: A METHODOLOGY FOR
AUTOMATED INSERTION OF CONCURRENT ERROR DETECTION HARDWARE IN
SYNTHESIZABLE VERILOG RTL |
| |
| 1688: AUTOMATED TEST
DEVELOPMENT AND TEST TIME REDUCTION FOR RF
SUBSYSTEMS |
| |
| 1938: A HEURISTIC DSP BIST
INSERTION ALGORITHM WITH MINIMUM AREA OVERHEAD |
| |
| 3050: PRACTICAL SOLUTIONS FOR
THE APPLICATION OF THE OSCILLATION-BASED TEST IN ANALOG
INTEGRATED CIRCUITS |
| |
| 1820: LOW-VOLTAGE ANALOG
CURRENT DETECTOR SUPPORTING AT-SPEED BIST |
| |
| Top |
| |
Wednesday, May 29, 1:30 -
3:00: verification
|
| |
| 1252: BOOLEAN VERIFICATION
WITH FASTEST LIA TRANSFORMS |
| |
| 1416: A DON'T-CARE BASED
IMAGE CIRCUIT FOR FUNCTION VERIFICATION |
| |
| 1961: AN EFFICIENT ALGORITHM
FOR LARGE-SIGNAL FREQUENCY-DOMAIN COUPLED DEVICE AND CIRCUIT
SIMULATION |
| |
| 2172: SEMI-FORMAL
VERIFICATION OF VHDL-AMS DESCRIPTIONS |
| |
| 1992: VARIABLE ORDERING ON
MULTIWAY DECISION GRAPHS |
| |
| Top |
| |
Wednesday, May 29, 3:30 -
5:00: fundamental
CAD algorithms
|
| |
| 1530: MODELING A NEW RTL
SEMANTICS IN C++ |
| |
| 1379: IDENTIFICATION OF
COMPLEMENT SINGLE VARIABLE SYMMETRY IN BOOLEAN FUNCTIONS
THROUGH WALSH TRANSFORM |
| |
| 1359: EFFICIENT ALGORITHMS
FOR PLANAR EMBEDDING OF GRAPHS WITH CONSTRAINTS IN PLACING
SPECIFIED VERTICES ON FACE BOUNDARIES |
| |
| 1212: ALGORITHMS FOR FAST
ARITHMETIC TRANSFORM |
| |
| 1199: GENERALIZED
MULTI-POLARITY HAAR TRANSFORM |
| |
| Top |
| |
Monday, May 27, 10:30 -
12:00: physical
design
|
| |
| 2717: SEQUENCE-PAIR BASED
PLACEMENT WITH BOUNDARY CONSTRAINTS |
| |
| 2114: A GENETIC APPROACH TO
ANALOG MODULE PLACEMENT WITH SIMULATED ANNEALING |
| |
| 2307: MODULE PLACEMENT WITH
PRE-PLACED MODULES USING THE CORNER BLOCK LIST
REPRESENTATION |
| |
| 1493: AN EFFECTIVE
FLOORPLAN-BASED POWER DISTRIBUTION NETWORK DESIGN METHODOLOGY
UNDER RELIABILITY CONSTRAINTS |
| |
| 3097: LARGE SCALE CLOCK SKEW
SCHEDULING TECHNIQUES FOR IMPROVED RELIABILITY OF DIGITAL
SYNCHRONOUS VLSI CIRCUITS |
| |
| Top |
| |
Monday, May 27, 1:30 - 3:00:
analog modeling,
synthesis and optimization
|
| |
| 1475: A CAD-ORIENTED METHOD
FOR OPTIMAL BIASING OF AMPLIFIERS |
| |
| 1726: GENOM: CIRCUIT-LEVEL
OPTIMIZER BASED ON A MODIFIED GENETIC ALGORITHM
KERNEL |
| |
| 2181: AUTOMATED SYNTHESIS AND
OPTIMIZATION OF ANALOG VLSI BANDPASS FILTERS FROM
HIGH-LEVEL |
| |
| 2774: AN INTERVAL
ARITHMETIC-BASED YIELD EVALUATION IN CIRCUIT TOLERANCE
DESIGN |
| |
| 1979: A NEW APPROACH TO
MODELING STATISTICAL VARIATIONS IN MOS
TRANSISTORS |
| |
| Top |
| |
Monday, May 27, 3:30 - 5:00:
numerical and
combinatorial optimiztion
|
| |
| 1924: WAVEFORM RELAXATION
OPERATOR AND ITS SPECTRA IN CIRCUIT SIMULATION UNDER PERIODIC
EXCITATION |
| |
| 1794: IMPROVING THE
CONVERGENCE OF COMBINED NEWTON-RAPHSON AND GAUSS-NEWTON
MULTILEVEL ITERATION METHOD |
| |
| 1522: FREQUENCY DOMAIN
WAVELET METHOD FOR HIGH-SPEED CIRCUIT SIMULATION |
| |
| 1982: A SIMPLE AND GENERAL
METHOD FOR DETECTING STRUCTURAL INCONSISTENCIES IN LARGE
ELECTRICAL NETWORKS |
| |
| 2302: CONSEQUENCE OF COUPLED
VARIABLES IN THE HOMOTOPIC SIMULATION OF BJT
CIRCUITS |
| |
| Top |
| |
Tuesday, May 28, 10:30 -
12:00: testing and
verification
|
| |
| 2232: LOCATING STUCK FAULTS
IN ANALOG CIRCUITS |
| |
| 2230: A DECOMPOSITION METHOD
FOR ANALOG FAULT LOCATION |
| |
| 2521: A FAULT TOLERANT
INCREMENTAL DESIGN METHODOLOGY |
| |
| 1765: TESTABILITY OF PATH
HISTORY MEMORIES WITH REGISTER-EXCHANGE ARCHITECTURE USED IN
VITERBI-DECODERS |
| |
| 2811: A COMBINED APPROACH TO
VALIDATE THE DESIGN OF EMBEDDED NETWORK DEVICES |
| |
| Top |
| |
Tuesday, May 28, 3:30 - 5:00:
synthesis
|
| |
| 1699: PARAMETER OPTIMIZATION
TOOL FOR ENCHANCING ON-CHIP NETWORK PERFORMANCE |
| |
| 2556: SWITCHING ACTIVITY
ESTIMATION OF FINITE STATE MACHINES FOR LOW POWER
SYNTHESIS |
| |
| 2666: ANTISYMMETRIES IN THE
REALIZATION OF BOOLEAN FUNCTIONS |
| |
| 1316: MEMORY EXPLORATION
UTILIZING SCHEDULING EFFECTS IN HIGH-LEVEL
SYNTHESIS |
| |
| 2548: AUTOMATED HIGH LEVEL
SYNTHESIS OF HARDWARE BUILDING BLOCKS PRESENT IN ART-BASED
NEURAL NETWORKS, FROM VHDL-AMS DESCRIPTIONS |
| |
| Top |
| |
Wednesday, May 29, 10:30 -
12:00: modeling and
simulation
|
| |
| 1659: LEAST SQUARES SOLUTION
OF NEARLY SQUARE OVERDETERMINED SPARSE LINEAR
SYSTEMS |
| |
| 1323: A SIMPLE SIMULATION
METHOD FOR ANALYZING SUBSTRATE COUPLING |
| |
| 1532: TIMING ANALYSIS OF
TREE-LIKE RLC CIRCUITS |
| |
| 1200: MUTUAL TRANSFORMATIONS
BETWEEN HAAR WAVELET AND ARITHMETIC SPECTRA |
| |
| 1183: INCORPORATION OF INPUT
GLITCHES INTO POWER MACROMODELING |
| |
| Top |
| |
Wednesday, May 29, 8:30 -
10:00: Optimization
in CAD
|
| |
| 2958: EFFICIENT APPROXIMATION
ALGORITHMS FOR THE MAXIMUM WEIGHT MATCHING
PROBLEM |
| |
| 3057: EXACT DISCRETIZATION OF
DIFFERENTIAL EQUATIONS BY S-Z TRANSFORM |
| |
| 1631: ON START POINT
SELECTION FOR THE TIME-OPTIMAL SYSTEM DESIGN
ALGORITHM |
| |
| 1304: SYNCHRONIZATION OF
DISTRIBUTED SIMULATIONS - A KALMAN FILTER
APPROACH |
| |
| Top |
| |
Tuesday, May 28, 1:30 - 3:00:
Analysis,Design and
Simulation of Power Electronics
Circuits
|
| |
| 1528: ANALYSIS OF INTERLEAVED
CONVERTERS WITH WTA-BASED SWITCHING |
| |
| 1137: ANALYSIS AND DESIGN OF
PWM REGULATORS FOR LARGE-SIGNAL STABILITY |
| |
| 1950: A METHOD FOR PREDICTING
THE ZVS CONDITION FOR THE CLASS E AMPLIFIER |
| |
| 1296: MAGNETIZING INRUSH
CURRENT OF A TRANSFORMER AND A NEW TECHNIQUE OF ITS
COMPUTATION |
| |
| Top |
| |
Tuesday, May 28, 3:30 - 5:00:
DC SWitching Mode
Power Supplies
|
| |
| 1839: DYNAMICS OF A
PHASE-CONTROLLED SERIES-PARALLEL RESONANT CONVERTER
|
| |
| 1893: DESIGN OF GENERALIZED
CLASS E^2 DC/DC CONVERTER |
| |
| 2166: BI-DIRECTIONAL
INTEGRATED CHARGE PUMPS |
| |
| 2919: AREA EFFICIENT CMOS
INTEGRATED CHARGE PUMPS |
| |
| 2710: DEVELOPMENT OF A
SINGLE-PHASE HALF-BRIDGE NEUTRAL POINT CLAMPED CONVERTER AND
ITS APPLICATIONS |
| |
| Top |
| |
Wednesday, May 29, 8:30 -
10:00: Power Factor
Correction Rectifiers and
Inverters
|
| |
| 1489: SIMPLIFIED INPUT
CURRENT WAVESHAPING TECHNIQUE BY USING INDUCTOR VOLTAGE
SENSING FOR POWER FACTOR CORRECTION ISOLATED SEPIC
RECTIFIER |
| |
| 1848: EVALUATION OF AN
IMPROVED INPUT CURRENT SHAPER USED AS POWER FACTOR CORRECTOR
IN ELECTRONIC BALLAST |
| |
| 2719: A SINGLE-PHASE
THREE-LEVEL BOOST TYPE RECTIFIER |
| |
| 1264: DESIGN CONSIDERATIONS
IN SLIDING-MODE CONTROLLED PARALLEL-CONNECTED
INVERTERS |
| |
| 1825: VOLTAGE-CLAMPED CLASS E
AMPLIFIER WITH A ZENER DIODE ACROSS THE SWITCH |
| |
| Top |
| |
Wednesday, May 29, 10:30 -
12:00: Control in
Power Electronics
|
| |
| 1884: POLE-ZERO TRACKING
FREQUENCY COMPENSATION FOR LOW DROPOUT REGULATOR |
| |
| 1998: DESIGN AND
IMPLEMENTATION OF AN HINF CONTROLLER FOR A BI-DIRECTIONAL
DC-DC CONVERTER |
| |
| 2269: BUCK-BOOST
SWITCHED-CAPACITOR DC-DC VOLTAGE REGULATOR USING DELTA-SIGMA
CONTROL LOOP |
| |
| 2823: NOMINAL AND TOLERANCE
DESIGN OF CLOSED-LOOP CONTROLLERS FOR DC-DC VOLTAGE
REGULATORS |
| |
| 2932: TOLERANCE DESIGN OF
DC-DC SWITCHING REGULATORS |
| |
| Top |
| |
Wednesday, May 29, 3:30 -
5:00: Power Systems
|
| |
| 1306: TIME-FREQUENCY ANALYSIS
IN POWER MEASUREMENT USING COMPLEX WAVELETS |
| |
| 2281: COHERENT DECOMPOSITIONS
OF POWER SYSTEMS SIGNALS USING DAMPED SINUSOIDS WITH
APPLICATIONS TO DENOISING |
| |
| 2351: DEFINING REACTIVE POWER
IN CIRCUIT TRANSIENTS VIA LOCAL FOURIER
COEFFICIENTS |
| |
| 2410: ANALYSIS OF LIMIT CYCLE
STABILITY IN A TAP-CHANGING TRANSFORMER |
| |
| 2978: ZONAL LOAD ESTIMATION
STUDIES IN RADIAL POWER DISTRIBUTION NETWORKS |
| |
| Top |
| |
Wednesday, May 29, 1:30 -
3:00: Power Systems
Lecture
|
| |
| 2896: A 2.8V RWDM BTL CLASS-D
POWER AMPLIFIER USING AN FGMOS COMPARATOR |
| |
| 1882: ON-CHIP CURRENT SENSING
TECHNIQUE FOR CMOS MONOLITHIC SWITCH-MODE POWER
CONVERTERS |
| |
| 3089: AVERAGING CIRCUIT FOR
SWITCHING POWER CONVERTERS CONTROL: A CMOS CURRENT-MODE
INTEGRATED IMPLEMENTATION |
| |
| 2853: ANALYSIS OF MEASUREMENT
DELAY ERRORS IN AN ETHERNET BASED COMMUNICATION INFRASTRUCTURE
FOR POWER SYSTEMS |
| |
| 2897: A NONLINEAR
OBSERVABILITY FORMULATION FOR POWER SYSTEMS INCORPORATING
GENERATOR DYNAMICS |
| |
| Top |
| |
Wednesday, May 29, 10:30 -
12:00: Power Systems
Poster 3
|
| |
| 2750: LARGE-SIGNAL
TIME-DOMAIN SIMULATION OF CLASS-E AMPLIFIER |
| |
| 1541: ENHANCED BUS INVERT
ENCODINGS FOR LOW-POWER |
| |
| 2078: OPTIMAL PLACEMENT OF
DECOUPLING CAPACITORS ON PCB USING POYNTING VECTORS OBTAINED
BY FDTD METHOD |
| |
| 2857: HIGH-EFFICIENCY
MICROWAVE BJT POWER AMPLIFIER SIMULATION |
| |
| 2544: A NEW METHOD FOR
EFFICIENT TIME-DOMAIN SIMULATION OF POWER ELECTRONIC CIRCUITS
|
| |
| Top |
| |
Wednesday, May 29, 3:30 -
5:00: Power
Electronics circuits and Systems Poster
1
|
| |
| 1067: STABILITY STUDY OF A
VOLTAGE-MODE BUCK REGULATOR USING SYSTEM POLES
APPROACH |
| |
| 1261: VERSATILE MACROMODEL
FOR THE POWER SUPPLY OF SUBMICRONIC CMOS MICROPROCESSORS BASED
ON VOLTAGE DOWN DC-DC CONVERTER |
| |
| 1639: A SINGLE-PHASE ACTIVE
POWER FILTER WHICH EMPLOYS A NEW ADAPTIVE HARMONIC EXTRACTION
SCHEME |
| |
| 1817: A ROBUST FREQUENCY
COMPENSATION SCHEME FOR LDO REGULATORS |
| |
| 1948: A COMPACT DC/AC
INVERTER FOR AUTOMOTIVE APPLICATION |
| |
| 3197: AN IMPROVED BANDGAP
REFERENCE WITH HIGH POWER SUPPLY REJECTION |
| |
| Top |
| |
Wednesday, May 29, 3:30 -
5:00: Power
Electronics circuits andSystems Poster
2
|
| |
| 2201: ANALYSIS OF A POWER
TOPOLOGY FOR A QUASI-RESONANT FAST ON-LOAD TAP CHANGING
REGULATOR |
| |
| 2363: DERIVATION OF THE
BUCK-BOOST PWM DC-DC CONVERTER CIRCUIT TOPOLOGY |
| |
| 2532: PERFORMANCE ANALYSIS OF
MICROCOMPUTER CONTROLLED DUAL SLOPE DELTA MODULATED PWM
INVERTER |
| |
| 2768: MEASUREMENT OF
OPEN-LOOP SMALL-SIGNAL CONTROL-TO-OUTPUT TRANSFER FUNCTION OF
A PWM BOOST CONVERTER OPERATED IN DCM |
| |
| 2800: RESISTIVE LOSSES OF
CONDUCTORS CARRYING SMPS CURRENT WAVEFORMS |
| |
| 3196: A 1MHZ VOLTAGE
MULTIPLIER DESIGN |
| |
| Top |
| |
Wednesday, May 29, 1:30 -
3:00: Nonlinear
Phenomena in Oscillators
|
| |
| 1738: THEORY AND DESIGN OF A
BIO-INSPIRED MULTISTABLE OSCILLATOR |
| |
| 1866: ANALYSIS OF HOPF
BIFURCATION IN PARALLEL-CONNECTED BOOST CONVERTERS VIA
AVERAGED MODELS |
| |
| 1272: BIFURCATION OF MODES IN
THREE-COUPLED OSCILLATORS WITH THE INCREASE OF
NONLINEARITY |
| |
| 1860: PHASE PATTERN SWITCHING
IN STAR-COUPLED WIEN-BRIDGE OSCILLATORS DRIVEN BY PULSE
TRAIN |
| |
| 1781: ANALYSIS OF PHASE-WAVES
IN COUPLED OSCILLATORS AS A LADDER |
| |
| Top |
| |
Wednesday, May 29, 10:30 -
12:00: Phase-Locked
Loops and Synthesizers
|
| |
| 2868: A LINEAR PHASE DETECTOR
FOR ARBITRARY CLOCK SIGNALS |
| |
| 1861: CMOS AUTO-RANGING PLL
FOR LOW-VOLTAGE WIDEBAND SYSTEMS |
| |
| 1710: PROGRAMMABLE VIDEO
CLOCK SYNTHESIZER WITH SUB 0.5NS DRIFT |
| |
| 2998: A NEW FAST-SETTLING
GEARSHIFT ADAPTIVE PLL TO EXTEND LOOP BANDWIDTH ENHANCEMENT IN
FREQUENCY SYNTHESIZERS |
| |
| 2615: A 2.1-GHZ MONOLITHIC
FREQUENCY SYNTHESIZER WITH ROBUST PHASE SWITCHING PRESCALER
AND LOOP CAPACITANCE SCALING |
| |
| Top |
| |
Wednesday, May 29, 8:30 -
10:00: Design and
Analysis of Oscillators
|
| |
| 2393: A STRUCTURALLY STABLE
REALIZATION FOR JACOBI ELLIPTIC FUNCTIONS |
| |
| 2115: K-BAND PHASE LOCKED
HAIR-PIN OSCILLATOR |
| |
| 2547: A 1-V, SELF ADJUSTING,
5-MHZ CMOS RC-OSCILLATOR |
| |
| 1964: A NON-FEEDBACK
MULTIPHASE CLOCK GENERATOR |
| |
| 2015: ANALYSIS OF JITTER IN
RING OSCILLATORS DUE TO DETERMINISTIC NOISE |
| |
| Top |
| |
Monday, May 27, 1:30 - 3:00:
Nonlinear Circuit
Analysis Methods
|
| |
| 1619: HARMONIC BALANCE AND
ALMOST PERIODIC INPUTS |
| |
| 1292: FREQUENCY RESPONSE OF
NONLINEAR NETWORKS USING CURVE TRACING ALGORITHM |
| |
| 1980: HOMSSPICE: A
HOMOTOPY-BASED CIRCUIT SIMULATOR FOR PERIODIC STEADY-STATE
ANALYSIS OF OSCILLATORS |
| |
| 1209: TOLERANCE ANALYSIS OF
NONLINEAR CIRCUITS USING SET-VALUED FUNCTIONS |
| |
| 2035: HARDWARE IMPLEMENTATION
OF MOORE TEST ON FPGA |
| |
| Top |
| |
Tuesday, May 28, 8:30 -
10:00: Chaotic
Circuits
|
| |
| 1527: A QUANTIZED CHAOTIC
SPIKING OSCILLATOR: ANALYSIS AND IMPLEMENTATION |
| |
| 1690: BIFURCATION IN
ASYMMETRICALLY COUPLED BVP OSCILLATORS |
| |
| 1713: COEXISTENCE OF
ATTRACTORS IN AN OSCILLATOR BASED ON HYSTERESIS |
| |
| 2178: TRICK OF SUPPRESSION OF
CHAOS BY WEAK RESONANT PERTURBATIONS |
| |
| 3049: CHAOTIC ATTRACTORS IN A
4-D OSCILLATOR BASED ON 2-PORT VCCSS |
| |
| Top |
| |
Tuesday, May 28, 10:30 -
12:00: Applications
of Chaos
|
| |
| 3088: CLUSTERING IN GLOBALLY
COUPLED SYSTEM OF CHAOTIC CIRCUITS |
| |
| 1957: GENERALIZED
SYNCHRONIZATION ON LINEAR MANIFOLD IN COUPLED NON-LINEAR
SYSTEMS |
| |
| 2746: CHAOTIC SYSTEM
RECONSTRUCTION FROM NOISY TIME SERIES MEASUREMENTS USING
IMPROVED LEAST SQUARES GENETIC PROGRAMMING |
| |
| 2955: MAPPING ATOMS TO
NONLINEAR CHUA'S CIRCUITS |
| |
| 1525: CMOS CIRCUIT DESIGN AND
IMPLEMENTATION OF THE DISCRETE TIME CHAOTIC CHIP |
| |
| Top |
| |
Tuesday, May 28, 1:30 - 3:00:
Chaos and
Information Processing
|
| |
| 3078: RESPONSE OF COUPLED
CHAOTIC CIRCUITS TO SINUSOIDAL INPUT SIGNAL |
| |
| 3079: SOLVING ABILITY OF
HOPFIELD NEURAL NETWORK WITH CHAOTIC NOISE AND BURST NOISE FOR
QUADRATIC ASSIGNMENT PROBLEM |
| |
| 3082: CHAOTIC OPTIMIZATION
FOR QUADRATIC ASSIGNMENT PROBLEMS |
| |
| 1260: ANALYSIS OF A TYPE
DIGITAL CHAOTIC CRYPTOSYSTEM |
| |
| 1940: DATA TRANSMISSION WITH
ADJUSTABLE SECURITY EXPLOITING CHAOS-BASED PSEUDORANDOM NUMBER
GENERATORS |
| |
| Top |
| |
Tuesday, May 28, 3:30 - 5:00:
Chaotic
Communications and Signal
Processing
|
| |
| 1801: OPTIMAL RECEIVER FOR
ERGODIC CHAOS SHIFT KEYING |
| |
| 2695: ON THE OPTIMAL LABELING
FOR PSEUDO-CHAOTIC PHASE HOPPING |
| |
| 1656: ON AUTO-CORRELATION
VALUES OF M-PHASE SPREADING SEQUENCES OF MARKOV
CHAINS |
| |
| 2109: FOLDED SUMS OF CHAOTIC
TRAJECTORIES DISTRIBUTE UNIFORMLY |
| |
| 2537: ON THE CORRELATION OF
NON-JITTERED AND CHAOTICALLY-JITTERED PWM SIGNALS CARRYING
MAXIMUM INFORMATION |
| |
| Top |
| |
Monday, May 27, 3:30 - 5:00:
Modeling of
Nonlinear Systems
|
| |
| 1374: HEAT TRANSFER
PREDICTIONS OF THE POISSON NOISE MODEL FOR NONLINEAR
DEVICES |
| |
| 1715: NON-LINEAR MODELING OF
A BROADBAND SLIC FOR ADSL-LITE-OVER-POTS USING HARMONIC
ANALYSIS |
| |
| 2250: VCO BEHAVIORAL MODELING
BASED ON THE NONLINEAR INTEGRAL APPROACH |
| |
| 3034: EFFECTS OF OPEN-LOOP
NONLINEARITY ON LINEARITY OF FEEDBACK AMPLIFIERS |
| |
| 2840: FUZZY INFERENCE ENGINE
PROVIDES OPPORTUNITY FOR TESTBED |
| |
| Top |
| |
Monday, May 27, 10:30 -
12:00: Stability and
Control
|
| |
| 1836: ANALYSIS OF
TIME-CONTROLLED SWITCHED SYSTEMS USING STABILITY PRESERVING
MAPPINGS |
| |
| 1117: CRITERIA FOR ASYMPTOTIC
STABILITY OF A CLASS OF DISCRETE SYSTEMS WITH MULTIPLE
INDEPENDENT VARIABLES |
| |
| 2948: STABILIZING LINEAR
TIME-INVARIANT SYSTEMS WITH FINITE-STATE HYBRID STATIC OUTPUT
FEEDBACK |
| |
| 1558: STABILITY AND
LINEARIZATION: DISCRETE-TIME SYSTEMS |
| |
| 1665: THE CAUCHY-FLOQUET
FACTORIZATION BY SUCCESSIVE RICCATI
TRANSFORMATIONS |
| |
| Top |
| |
Monday, May 27, 10:30 -
12:00: Bifurcation
and Chaos
|
| |
| 2270: ANALYSIS OF THE
OSCILLATION PROBLEM IN TRI-FLOPS |
| |
| 2125: EXPERIMENTAL DETECTION
OF BIFURCATIONS AND SLIDING IN DC-DC POWER
CONVERTERS |
| |
| 3094: AN ADVANCED DESIGN
METHOD OF BURSTING IN FITZHUGH-NAGUMO MODEL |
| |
| 1929: PERFORMANCE ANALYSIS IN
CHAOTIC-ITERATION-BASED ADCS |
| |
| 1648: AN OPTIMAL ESTIMATION
ALGORITHM FOR MULTIUSER CHAOTIC COMMUNICATIONS
SYSTEMS |
| |
| Top |
| |
Tuesday, May 28, 10:30 -
12:00: Voltage-Controlled Oscillators and Phase-Locked
Loops
|
| |
| 3102: MODELING A RESONANT LC
TANK CIRCUIT EMBEDDED IN A VCO |
| |
| 2617: A CMOS PHASE-LOCKED
LOOP WITH AN AUTO-CALIBRATED VCO |
| |
| 1802: ANALYSIS OF VCO JITTER
IN CHIP-PACKAGE CO-DESIGN |
| |
| 3030: BIT ERROR RATE ANALYSIS
OF THE DATA RECOVERY SYSTEM USING JITTER MODELS |
| |
| 2214: DISCRETE-TIME
PHASE-LOCKED LOOP AS A SOURCE OF RANDOM SEQUENCES WITH
DIFFERENT DISTRIBUTIONS |
| |
| Top |
| |
Wednesday, May 29, 8:30 -
10:00: Nonlinear
Circuit Design and Implementation
|
| |
| 2813: INTERMODULATION
DISTORTION MEASURES IN A STOCHASTIC RESONATOR |
| |
| 3011: A CMOS COMPANDING-BASED
THIRD ORDER CHEBYSHEV FILTER |
| |
| 2699: FRACTIONAL-N FREQUENCY
SYNTHESIZER FOR WIRELESS COMMUNICATIONS |
| |
| 2245: FREQUENCY DIVISION
USING AN INJECTION-LOCKED RELAXATION OSCILLATOR |
| |
| Top |
| |
Tuesday, May 28, 1:30 - 3:00:
Modeling and
Analysis of Nonlinear Systems
|
| |
| 1298: A PROCEDURE FOR THE
PIECEWISE-LINEAR APPROXIMATION OF THE RESISTIVE PART OF A
CELLULAR NONLINEAR NETWORK |
| |
| 2355: PRACTICAL NOTES ON TWO
VOLTERRA FILTER IDENTIFICATION DIRECT METHODS |
| |
| 1883: 5TH ORDER MULTI-TONE
VOLTERRA SIMULATOR WITH COMPONENT-LEVEL OUTPUT |
| |
| 1536: NONLINEAR PREDICTION OF
BRAIN ELECTRICAL ACTIVITY IN EPILEPSY WITH A VOLTERRA RLS
ALGORITHM |
| |
| 2533: AN ANALYSIS OF THE
INTERNET TRAFFIC BY THE METHOD OF SURROGATE DATA |
| |
| Top |
| |
Monday, May 27, 3:30 - 5:00:
Multidimentional
Signal Processing
|
| |
| 1178: DESIGN OF
TWO-DIMENSIONAL COSINE-MODULATED OVERSAMPLED FIR FILTER BANKS:
PR CONDITION |
| |
| 1521: NONLINEAR PROCESSING OF
N-DIMENSIONAL PHASE SIGNALS |
| |
| 1958: NON-UNIFORM BANDWIDTH
FREQUENCY-PLANAR (NUB-FP) FILTER BANKS |
| |
| 2120: NEW DESIGN METHODS OF
FIR FILTERS WITH SINED POWER OF TWO COEFFICIENTS BASED ON A
NEW LINEAR PROGRAMMING RELAXATION WITH TRIANGLE
INEQUALITIES |
| |
| 1177: RESULTS ON A CLASS OF
BIORTHOGONAL 2-D LP FIR FILTER BANKS |
| |
| Top |
| |
Monday, May 27, 10:30 -
12:00: Adaptive
Filtering
|
| |
| 2013: A PARALLEL FAST
ALGORITHM OF VOLTERRA ADAPTIVE FILTERS |
| |
| 1153: AN IMPROVED STOCHASTIC
MODEL FOR THE LEAST MEAN FOURTH (LMF) ADAPTIVE
ALGORITHM |
| |
| 1677: A PIECEWISE LINEAR
DYNAMICAL FUNCTIONAL ARTIFICIAL NEURAL NETWORK (PWL-DFANN) FOR
NONLINEAR ADAPTIVE TIME SERIES PREDICTION |
| |
| 2501: CONVERGENCE PROPERTIES
OF ADAPTIVE FAULT TOLERANT DIGITAL FILTERS IN THE PRESENCE OF
TRANSIENT ERRORS |
| |
| 1383: PIPELINED RLS ADAPTIVE
ARCHITECTURE USING RELAXED GIVENS ROTATIONS (RGR) |
| |
| Top |
| |
Monday, May 27, 1:30 - 3:00:
DSP System
Implementation
|
| |
| 1354: A NEW GROUP DISTRIBUTED
ARITHMETIC DESIGN FOR THE ONE DIMENSIONAL DISCRETE FOURIER
TRANSFORM |
| |
| 1096: A NEW HARDWARE
EFFICIENT COHERENT DIGITAL SWEEP OSCILLATOR WITH VERY LOW
SWEEP RATES AND HARMONIC DISTORTION |
| |
| 1622: A RETARGETABLE TOOL
SUITE FOR THE DESIGN OF APPLICATION SPECIFIC INSTRUCTION SET
PROCESSORS USING A MACHINE DESCRIPTION LANGUAGE |
| |
| 2311: COMPARISON OF DIGITAL
LINEARIZATION METHODS FOR EMBEDDED SENSOR
INTERFACES |
| |
| 2378: ASIC IMPLEMENTATION
ARCHITECTURE FOR PULSE SHAPING FIR FILTERS IN 3G |
| |
| Top |
| |
Wednesday, May 29, 8:30 -
10:00: Signal
Processing for Communications
|
| |
| 1214: DESIGN OF A NEW SIGNAL
SECURITY SYSTEM |
| |
| 1288: A NOVEL ADAPTIVE
ALGORITHM APPLIED TO A CLASS OF REDUNDANT REPRESENTATION
VECTOR QUANTIZERS FOR WAVEFORM AND MODEL BASED
CODING. |
| |
| 1455: SPECTRUM MANAGEMENT OF
PULSE TRANSMISSION BY HIGH-CUT FILTER LINE |
| |
| 1687: A HIGH THROUGHPUT
CONTEXT-BASED ADAPTIVE ARITHMETIC CODEC FOR JPEG2000
|
| |
| 2331: AN ADAPTIVE VITERBI
ALGORITHM BASED ON STRONGLY CONNECTED TRELLIS DECODING
|
| |
| Top |
| |
Monday, May 27, 3:30 - 5:00:
Filter
Banks
|
| |
| 2835: DESIGN OF PROTOTYPE
FILTER FOR NEAR-PERFECT-RECONSTRUCTION OVERLAPPED
COMPLEX-MODULATED TRANSMULTIPLEXERS |
| |
| 2117: AN EFFICIENT APPROACH
FOR DESIGNING NEARLY PERFECT-RECONSTRUCTION LOW-DELAY
COSINE-MODULATED FILTER BANKS |
| |
| 2217: STEP-RESPONSE-BASED
CHARACTERIZATION OF NONUNIFORM PERFECT-RECONSTRUCTION FILTER
BANKS |
| |
| 2928: COMPLEX MODULATED
CRITICALLY SAMPLED FILTER BANKS BASED ON COSINE AND SINE
MODULATION |
| |
| 2112: APPLICATION OF
UNIMODULAR MATRICES TO SIGNAL COMPRESSION |
| |
| Top |
| |
Tuesday, May 28, 10:30 -
12:00: Adaptive
Signal Processing
|
| |
| 1821: A NOVEL SPARSE ADAPTIVE
ALGORITHM USING WAVELETS |
| |
| 2014: DESIGN METHOD FOR
OPTIMAL STEP SIZE MATRIX OF THE AFFINE PROJECTION ALGORITHM
USING SEMIDEFINITE PROGRAMMING |
| |
| 2322: ENHANCED ADAPTIVE
SPARSE ALGORITHMS USING THE HAAR WAVELET |
| |
| 2011: A NEW ADAPTIVE KALMAN
FILTERS USING FILTER BANK |
| |
| 1947: A NEW FAMILY OF
MAXIMALLY DECIMATED ADAPTIVE FILTERING STRUCTURES BASED ON
TRANSMULTIPLEXERS |
| |
| Top |
| |
Tuesday, May 28, 1:30 - 3:00:
Transforms and
Multirate Systems
|
| |
| 2073: LOSSLESS/LOSSY IMAGE
COMPRESSION BASED ON NON-SEPARABLE TWO-DIMENSIONAL
L-SSKF |
| |
| 2446: INTEGER- AND
RATIONAL-COEFFICIENT M-BAND WAVELET |
| |
| 2087: A MULTISTAGE
FILTERBANK-BASED CHANNELIZER AND ITS MULTIPLIER-LESS
REALIZATION |
| |
| 1593: THE UNIFIED DISCRETE
FOURIER-HARTLEY TRANSFORMS: THEORY AND STRUCTURE |
| |
| 2051: LINEAR PHASE IIR FILTER
BANK DESIGN BY LMI BASED H INF OPTIMIZATION |
| |
| Top |
| |
Tuesday, May 28, 3:30 - 5:00:
Speech
Processing
|
| |
| 1122: PERCEPTUAL QUANTIZATION
USING JNLD THRESHOLDS |
| |
| 1823: SOUND SPECIFIC
MODELLING AND SYNTHESIS WITH A NEW POSTFILTERING IN LOW BIT
RATE SPEECH CODING |
| |
| 2044: A NEW SPECTRUM
ESTIMATION METHOD OF A SPEECH WAVEFORM BY ELIMINATING HIGH
FREQUENCY PITCH PERIOD |
| |
| 3015: A HIGH QUALITY
RE-QUANTIZATION/QUANTIZATION METHOD FOR MP3 AND MPEG-4 AAC
AUDIO CODING |
| |
| 2652: STOCHASTIC RESONANCE IN
SPEECH RECOGNITION: DIFFERENTIATING BETWEEN /B/ AND
/V/. |
| |
| Top |
| |
Monday, May 27, 10:30 -
12:00: DSP for
Communications I
|
| |
| 1205: ON POWER ALLOCATION FOR
GENERALIZED CYCLIC-PREFIX BASED
CHANNEL-EQUALIZERS |
| |
| 1483: AN IMPROVED
PEAK-TO-AVERAGE POWER-RATIO REDUCTION ALGORITHM FOR
MULTICARRIER COMMUNICATIONS |
| |
| 1484: SUBSPACE
ESTIMATION-BASED CONSTRAINED OPTIMIZATION METHOD FOR MULTIPATH
CDMA CHANNELS |
| |
| 1545: ENHANCING ROBUSTNESS OF
INFORMATION HIDING AGAINST INTERFERENCE OF COMMUNICATION WITH
TURBO CODE |
| |
| 1811: SUCCESSIVE PACKING
BASED INTERLEAVER DESIGN FOR TURBO CODES |
| |
| Top |
| |
Tuesday, May 28, 8:30 -
10:00: DSP for
Communications II
|
| |
| 2083: FLEXIBLE DOWN-SAMPLING
USING CIC FILTER WITH NON-INTEGER DELAY |
| |
| 1389: OPTIMAL OVER SAMPLED
CHAOTIC MAP BINARY SEQUENCES FOR CDMA |
| |
| 2122: CLOSED-FORM EXPRESSION
OF SMITH FORMS FOR PSEUDO-CIRCULANTS |
| |
| 2274: UNSUPERVISED NN
APPROACH AND PCA FOR BACKGROUND-FOREGROUND VIDEO
SEGMENTATION |
| |
| Top |
| |
Wednesday, May 29, 10:30 -
12:00: Digital
Signal Processing Applications
|
| |
| 2434: STOCHASTIC RESONANCE OF
A THRESHOLD DETECTOR: IMAGE VISUALIZATION AND
EXPLANATION |
| |
| 2721: AN EMBEDDED DSP CORE
FOR WIRELESS COMMUNICATION |
| |
| 2042: USING A SPECTRAL
TECHNIQUE, GENETIC ALGORITHMS AND DECISION DIAGRAMS FOR
FINDING UNCONDITIONAL TABLE TESTS |
| |
| 2010: ON DATA ADDRESS
COMPUTATION FOR EMBEDDED DSP SYSTEMS |
| |
| 2644: MINOR AND MAJOR
SUBSPACE COMPUTATION OF LARGE MATRICES |
| |
| Top |
| |
Wednesday, May 29, 10:30 -
12:00: Implementation of DSP
Systems
|
| |
| 2747: A MULTIPLIER-LESS 1-D
AND 2-D FAST FOURIER TRANSFORM-LIKE TRANSFORMATION USING
SUM-OF-POWERS-OF-TWO (SOPOT) COEFFICIENTS |
| |
| 1704: HIGH-PERFORMANCE FIR
GENERATION BASED ON A TIMING-DRIVEN ARCHITECTURE AND COMPONENT
SELECTION METHOD |
| |
| 1743: AN FPGA IMPLEMENTATION
OF AN ON-LINE RADIX-4 CORDIC 2-D IDCT CORE |
| |
| 2641: NEW ALGORITHMS FOR
COMPUTING THE MINIMUM EIGENPAIR OF THE GENERALIZED SYMMETRIC
EIGENVALUE PROBLEM |
| |
| 1421: CALCULATION OF WALSH
TRANSFORM ON MASPAR COMPUTER |
| |
| Top |
| |
Wednesday, May 29, 8:30 -
10:00: FIR
Filters
|
| |
| 1776: DESIGN AND
MULTIPLIER-FREE REALIZATION OF FIR NYQUIST FILTERS WITH
COEFFICIENTS TAKING ONLY DISCRETE VALUES |
| |
| 1833: AN EFFICIENT DESIGN FOR
FIR FILTERS WITH VARIABLE PRECISION |
| |
| 1891: EFFICIENT DIGIT-SERIAL
FIR FILTERS WITH SKEW-TOLERANT DOMINO |
| |
| 2055: BENCHMARKS FOR
PROGRAMMABLE FIR FILTERS BUILT IN RNS-FPL
TECHNOLOGY |
| |
| 2442: LOW POWER
IMPLEMENTATION OF HIGH THROUGHPUT FIR FILTERS |
| |
| Top |
| |
Monday, May 27, 1:30 - 3:00:
FIR Filter Design
and Implementation
|
| |
| 1169: OPTIMAL DESIGN AND
PARALLEL IMPLEMENTATION OF FIR FILTERS WITH VARIABLE MAGNITUDE
AND FRACTIONAL-DELAY RESPONSES |
| |
| 1289: A DESIGN METHOD OF LOW
DELAY LOWPASS FIR FILTERS WITH MAXIMALLY FLAT CHARACTERISTICS
IN THE PASSBAND AND THE TRANSMISSION ZEROS IN THE
STOPBAND |
| |
| 1485: MINIMAX DESIGN OF
NONLINEAR-PHASE FIR FILTERS: A LEAST-PTH APPROACH |
| |
| 1792: ON DESIGNING FIR
FILTERS USING WINDOWS BASED ON GEGENBAUER
POLYNOMIALS |
| |
| 2738: INTELLIGENT MULTIPOINT
ARNOLDI (IMA) APPROXIMATIONS OF FIR FILTERS BY LOW-ORDER
LINEAR-PHASE IIR FILTERS |
| |
| Top |
| |
Tuesday, May 28, 10:30 -
12:00: IIR Digital
Filters
|
| |
| 1700: DIGIT-SERIAL
IMPLEMENTATION OF LDI/LDD ALLPASS FILTERS |
| |
| 1890: COSET DECOMPOSITION IN
LATTICES YIELDS SAMPLE-BLOCK NUMBER SYSTEMS |
| |
| 2265: MULTIPLIERLESS
IMPLEMENTATION OF BANDPASS AND BANDSTOP RECURSIVE DIGITAL
FILTERS |
| |
| 2219: MULTIPLIERLESS
IMPLEMENTATION OF ALL-POLE DIGITAL FILTERS |
| |
| 3091: HIGH-ORDER TUNABLE
PASSIVE DIGITAL FILTERS |
| |
| Top |
| |
Wednesday, May 29, 1:30 -
3:00: Multirate
Systems and Coding
|
| |
| 1919: LOSSLESS/LOSSY CODING
GAIN TO EVALUATE CODING PERFORMANCE OF THE LOSSLESS/LOSSY
WAVELET |
| |
| 2953: ON THE THEORY AND
DESIGN OF A CLASS OF PERFECT-RECONSTRUCTION NONUNIFORM
COSINE-MODULATED FILTER-BANKS |
| |
| 1931: MULTIRATE APPROXIMATELY
LINEAR-PHASE IIR FILTER STRUCTURES FOR ARBITRARY
BANDWIDTHS |
| |
| 2977: AN ALTERNATIVE APPROACH
TO THE DESIGN AND SYNTHESIS OF HIGHER-ORDER BODE-TYPE
VARIABLE-AMPLITUDE WAVE-DIGITAL EQUALIZERS |
| |
| 2791: A COST-EFFECTIVE AND
HIGH-PRECISION ARCHITECTURE FOR CORDIC-BASED ADAPTIVE LATTICE
FILTERS |
| |
| Top |
| |
Wednesday, May 29, 3:30 -
5:00: Digital
Filters
|
| |
| 1810: MAXIMALLY FLAT ALLPASS
FRACTIONAL HILBERT TRANSFORMERS |
| |
| 2654: A TRUNCATED POLYNOMIAL
INTERPOLATION THEOREM AND ITS APPLICATION TO THE WLS DESIGN OF
IIR FILTERS |
| |
| 1305: MINIMIZATION OF
ROUNDOFF NOISE IN STATE-SPACE DIGITAL FILTERS USING ERROR
FEEDBACK AND COORDINATE TRANSFORMATION |
| |
| 1076: DESIGN OF VARIABLE
FRACTIONAL DELAY ALLPASS FILTER USING WEIGHTED LEAST SQUARES
METHOD |
| |
| 1481: PROBLEM DIMENSIONALITY
REDUCTION IN DESIGN OF OPTIMAL IIR FILTERS |
| |
| Top |
| |
Monday, May 27, 3:30 - 5:00:
Signal Processing
Systems
|
| |
| 2076: ON THE DESIGN AND
IMPLEMENTATION OF FIR AND IIR DIGITAL FILTERS WITH VARIABLE
FREQUENCY CHARACTERISTICS |
| |
| 2317: USING 2ND-ORDER
INFORMATION TO REDUCE AVERAGE COEFFICIENT LENGTH IN IIR
FILTERS |
| |
| 1863: DOA ESTIMATION USING
TWO CLOSELY SPACED MICROPHONES |
| |
| 2814: PERFORMANCE OF
MULTI-MODE ALGORITHMS FOR BLIND EQUALIZATION OF M-QAM
SIGNALS |
| |
| 2398: ADAPTIVE
EIGEN-PROJECTION ALGORITHMS FOR 1-D AND 2-D ANTENNA
ARRAYS |
| |
| Top |
| |
Tuesday, May 28, 8:30 -
10:00: Signal
Processing Algorithms
|
| |
| 2002: COMPARISON OF THE
MODIFIED LEAST SQUARES AND THE WEIGHTED LEAST SQUARES
ALGORITHMS FOR DESIGNING QUADRATURE MIRROR FILTER
BANKS |
| |
| 3081: TWO FAMILIES OF
SYMMETRY-PRESERVING REVERSIBLE INTEGER-TO-INTEGER WAVELET
TRANSFORMS |
| |
| 1935: RECONSTRUCTION OF A
CLASS OF NONUNIFORMLY SAMPLED AND DECIMATED BANDLIMITED
SIGNALS |
| |
| 2428: SPEAKER RECOGNITION
EMPLOYING WAVEFORM BASED SIGNAL REPRESENTATION IN
NONORTHOGONAL MULTIPLE TRANSFORM DOMAINS |
| |
| 2874: A COMPARISON OF
AUTOMATIC WORD LENGTH OPTIMIZATION PROCEDURES |
| |
| Top |
| |
Monday, May 27, 3:30 - 5:00:
Audio and Speech
Processing
|
| |
| 1387: MULTIPLE CHANNEL ACTIVE
NOISE CONTROL SYSTEM BASED ON SIMULTANEOUS EQUATIONS
METHODS |
| |
| 1534: OPTIMAL ROOT CEPSTRAL
ANALYSIS FOR SPEECH RECOGNITION |
| |
| 2189: SINUSOIDAL
ANALYSIS-SYNTHESIS OF AUDIO USING PERCEPTUAL CRITERIA
|
| |
| 2376: FAST AND LOSSLESS
IMPLEMENTATION OF THE FORWARD AND INVERSE MODIFIED DISCRETE
COSINE TRANSFORM |
| |
| Top |
| |
Wednesday, May 29, 1:30 -
3:00: Adaptive
Systems: Analysis and Applications
|
| |
| 1785: ADAPTIVE OPTIMIZATION
OF NOTCH BANDWIDTH OF AN IIR FILTER USED TO SUPPRESS
NARROW-BAND INTERFERENCE |
| |
| 2842: STEADY-STATE ANALYSIS
OF A SUBBAND ADAPTIVE ALGORITHM WITH CRITICAL
SAMPLING |
| |
| 2538: AN ALTERNATIVE METHOD
FOR NOISY AUTOREGRESSIVE SIGNAL ESTIMATION |
| |
| 3016: AN IMPROVED NLMS
ALGORITHM FOR CHANNEL EQUALIZATION |
| |
| 1746: PERFORMANCE ANALYSIS OF
NONLINEAR RLS IN MIXTURE NOISE |
| |
| Top |
| |
Wednesday, May 29, 10:30 -
12:00: Wavelets and
Multirate Systems
|
| |
| 1753: CYCLIC SHIFTING AND
MODULAR PERMUTATIONS -SIEVES FOR BETTER PERFORMANCE RADAR
SEQUENCES |
| |
| 2849: FINITE-LENGTH SYNTHESIS
FILTERS FOR NON-UNIFORMLY TIME-INTERLEAVED ANALOG-TO-DIGITAL
CONVERTER |
| |
| 2724: A TWO-PASS OPTIMAL
MOTION-THREADING TECHNIQUE FOR 3D WAVELET VIDEO
CODING |
| |
| 2705: ARCHITECTURE AND
PERFORMANCE CHARACTERIZATION OF HARDWARE AND SOFTWARE
IMPLEMENTATIONS OF THE CROZIER FREQUENCY ESTIMATION
ALGORITHM |
| |
| 2905: ADAPTIVE WAVELET
THRESHOLDING FOR TIME VARYING SNR SIGNAL
DENOISING |
| |
| Top |
| |
Tuesday, May 28, 3:30 - 5:00:
Filter Banks and
Multirate Systems
|
| |
| 2981: A SYSTEMATIC TECHNIQUE
FOR OPTIMIZATING MULTIPLE BRANCH FIR FILTERS FOR SAMPLING RATE
CONVERSION |
| |
| 2086: IMPLEMENTATION OF THE
TRANSPOSED FARROW STRUCTURE |
| |
| 1518: FRACTIONAL BIORTHOGONAL
PARTNERS AND APPLICATION IN SIGNAL INTERPOLATION |
| |
| 3020: MULTIPLIER-LESS
IMPLEMENTATION OF LINEAR PHASE COSINE MODULATED FILTER BANKS
WITH COMPOSITE CHANNEL NUMBER |
| |
| 1202: LIFTING BASED INTEGER
WAVELET TRANSFORM WITH BINARY COEFFICIENTS |
| |
| Top |
| |
Tuesday, May 28, 1:30 - 3:00:
Applications of DSP
in Communications
|
| |
| 2852: A PREFILTERING APPROACH
TO FREQUENCY OFFSET ESTIMATION IN AWGN |
| |
| 2220: APPLICATION OF DIGITAL
WIDE BAND MISMATCH CALIBRATION TO AN I/Q RECEIVER |
| |
| 2477: A NEW NOISE REDUCTION
METHOD USING LINEAR PREDICTION ERROR FILTER AND ADAPTIVE
DIGITAL FILTER |
| |
| 1920: MEASUREMENT TIME
REQUIREMENT FOR GENERALIZED CROSS-CORRELATION BASED TIME-DELAY
ESTIMATION |
| |
| 1571: A MODIFIED
IDENTIFICATION ALGORITHM FOR LINEAR SYSTEMS WITH NOISY
INPUT-OUTPUT DATA |
| |
| Top |
| |
Monday, May 27, 10:30 -
12:00: DSP System
Design and Implementation
|
| |
| 2866: INTERPOLATION OF
DISCRETE PERIODIC NONUNIFORM DECIMATION USING ALIAS
UNRAVELING |
| |
| 1595: LOW COEFFICIENT
COMPLEXITY APPROXIMATIONS OF THE ONE DIMENSIONAL DISCRETE
COSINE TRANSFORM |
| |
| 1303: ERROR SPECTRUM SHAPING
IN CLOSED-LOOP SYSTEMS WITH STATE-ESTIMATE FEEDBACK
CONTROLLER |
| |
| 2264: DESIGN OF A DSP-BASED
24 BIT DIGITAL AUDIO EQUALIZER FOR AUTOMOTIVE APPLICATIONS
|
| |
| 2503: POWER ANALYSIS OF
MULTIPLIER BLOCKS |
| |
| Top |
| |
Wednesday, May 29, 8:30 -
10:00: Digital
Filter Analysis and Design
|
| |
| 1179: DESIGN OF VARIABLE
LAGUERRE FILTERS |
| |
| 1075: DESIGN OF VARIABLE
FRACTIONAL DELAY FIR FILTER USING DIFFERENTIATOR
BANK |
| |
| 1454: DESIGN AND
IMPLEMENTATION OF A NOVEL ALGORITHM FOR GENERAL PURPOSE MEDIAN
FILTERING ON FPGAS |
| |
| 2032: MIN-MAX INTERPOLATORS
AND LAGRANGE INTERPOLATION FORMULA. |
| |
| 2323: DYNAMIC RANGE OF
ALLPASS FILTER STRUCTURES |
| |
| Top |
| |
Wednesday, May 29, 3:30 -
5:00: Analysis,
Design, and Implementation of DSP
Systems
|
| |
| 2084: DESIGN AND
IMPLEMENTATION OF MULTIPLIER-LESS TUNABLE 2-D FIR FILTERS
USING MCCLELLAN TRANSFORMATION |
| |
| 2037: TRACKING INSTANTANEOUS
FREQUENCY USING TWO-SIDED LINEAR PREDICTION |
| |
| 2918: AN IMPROVEMENT OF
CONVERGENCE OF FFT-BASED NUMERICAL INVERSION OF LAPLACE
TRANSFORMS |
| |
| 2256: DESIGNING MULTIPLIER
BLOCKS WITH LOW LOGIC DEPTH |
| |
2495: ON THE INVARIANCE OF
SECOND-ORDER MODES UNDER FREQUENCY TRANSFORMATION IN 2-D
SEPARABLE DENOMINATOR DIGITAL FILTERS
|
| |
| Top |
| |
Monday, May 27, 10:30 -
12:00: Blind DSP
Oral 1
|
| |
| 1302: SPACE-TIME BLIND
ADAPTIVE MULTIUSER DETECTION IN ANTENNA ARRAY CDMA
SYSTEMS |
| |
| 1535: SUPPRESSION OF
BIT-PULSED JAMMER SIGNALS IN DS-CDMA ARRAY SYSTEM USING
INDEPENDENT COMPONENT ANALYSIS |
| |
| 2246: MULTIUSER WAVELET BASED
MC-CDMA RECEIVER WITH LINEARLY CONSTRAINED CONSTANT MODULUS
IQRD-RLS ALGORITHM |
| |
| 2508: STATE SPACE BLIND
SOURCE RECOVERY FOR MIXTURES OF MULTIPLE SOURCE
DISTRIBUTIONS |
| |
| 2954: WAVELET DE-NOISING FOR
HIGHLY NOISY SOURCE SEPARATION |
| |
| Top |
| |
Monday, May 27, 1:30 - 3:00:
Blind DSP Poster
1
|
| |
| 2386: A MULTIRATE APPROACH TO
MULTICHANNEL BLIND DECONVOLUTION |
| |
| 1519: A NEW BLIND SIGNATURE
WAVEFORM ESTIMATION APPROACH IN ANTENNA ARRAY CDMA
SYSTEMS |
| |
| 3051: BLIND ELECTROMAGNETIC
SOURCE SEPARATION AND LOCALIZATION |
| |
| 3014: REDUCED-DIMENSION
MULTIUSER DETECTION BASED ON GROUPING USERS AND REDUCING
EFFECTIVE LENGTH OF SPREAD SPECTRUM CODE IN CDMA
SYSTEMS |
| |
| 2072: ON THE DESIGN OF
DIGITAL BROADBAND BEAMFORMER FOR UNIFORM CIRCULAR ARRAY WITH
FREQUENCY INVARIANT CHARACTERISTICS |
| |
| 2316: BLIND SPACE-TIME
MULTIUSER DETECTOR |
| |
| Top |
| |
Tuesday, May 28, 1:30 - 3:00:
Multimedia
Watermarking 1
|
| |
| 2045: AN IMAGE WATERMARKING
ALGORITHM ROBUST TO GEOMETRIC DISTORTION |
| |
| 2509: IMAGE-ADAPTIVE
WATERMARKING BASED ON WARPED DISCRETE COSINE
TRANSFORM |
| |
| 1171: ANALYSIS AND
IMPROVEMENT OF CORRELATION-BASED WATERMARKING METHODS FOR
DIGITAL IMAGES |
| |
| 1411: INDEPENDENT COMPONENT
ANALYSIS OF DIGITAL IMAGE WATERMARKING |
| |
| 2949: A ROBUST TYPE-III DATA
HIDING TECHNIQUE AGAINST CROPPING \& RESIZING
ATTACKS |
| |
| Top |
| |
Tuesday, May 28, 3:30 - 5:00:
Multimedia
Watermarking 2
|
| |
| 2999: A NOVEL SEMI-PRIVATE
WATERMARKING TECHNIQUE |
| |
| 2406: A BLIND AUDIO
WATERMARKING ALGORITHM WITH SELF-SYNCHRONIZATION |
| |
| 2529: A ROBUST DWT-BASED
VIDEO WATERMARKING ALGORITHM |
| |
| 2012: A DATA HIDING FOR AUDIO
USING BAND DIVIDING BASED ON QMF BANK |
| |
| 2255: A ROBUST PUBLIC
WATERMARK FOR HALFTONE IMAGES |
| |
| Top |
| |
Tuesday, May 28, 8:30 -
10:00: Hardware
Implementation for Multimedia 1
|
| |
| 1271: A FIXED-POINT MPEG
AUDIO PROCESSOR FOR LOW FREQUENCY OPERATION |
| |
| 2514: A COST EFFECTIVE
MULTIMEDIA EXTENSION TO ARM7 MICROPROCESSORS |
| |
| 2525: AN UVLC ENCODER
ARCHITECTURE FOR H.26L |
| |
| 2959: AN EFFICIENT
ARCHITECTURE FOR TWO-DIMENSIONAL INVERSE DISCRETE WAVELET
TRANSFORM |
| |
| 1490: AN EFFICIENT MODELING
CODEC ARCHITECTURE FOR BINARY SHAPE CODING |
| |
| Top |
| |
Tuesday, May 28, 10:30 -
12:00: Multimedia
Communication and Transmission 1
|
| |
| 1510: PROVIDING MULTIPLE
FAST-FORWARD RATIOS WITH FIXED NETWORK/DISK
BANDWIDTH |
| |
| 1693: CRYPTANALYSIS OF A
CHAOTIC IMAGE ENCRYPTION METHOD |
| |
| 2104: CHANNEL-ADAPTIVE ERROR
PROTECTION FOR SCALABLE VIDEO OVER CHANNELS WITH BIT ERRORS
AND PACKET ERASURES |
| |
| 2364: ADAPTIVE JOINT
SOURCE/CHANNEL CODING FOR ROBUST VIDEO
TRANSMISSION |
| |
| 2432: AN ADAPTATION SCHEME
FOR REAL-TIME VIDEO STREAMING |
| |
| Top |
| |
Wednesday, May 29, 8:30 -
10:00: Multimedia
Retrieval Systems
|
| |
| 1547: CONTENT-BASED VIDEO
RETRIEVAL USING MOTION DESCRIPTORS EXTRACTED FROM COMPRESSED
DOMAIN |
| |
| 1608: REGION-BASED RELEVANCE
FEEDBACK IN IMAGE RETRIEVAL |
| |
| 1716: A NOVEL VIDEO KEY FRAME
EXTRACTION ALGORITHM |
| |
| 1824: A LIFTING BASED SYSTEM
FOR OPTIMAL COMPRESSION AND CLASSIFICATION IN THE JPEG2000
FRAMEWORK |
| |
| 2619: EFFICIENT CONTENT-BASED
CT BRAIN IMAGE RETRIEVAL BY USING REGION SHAPE
FEATURES |
| |
| Top |
| |
Wednesday, May 29, 10:30 -
12:00: Multimedia
Coding
|
| |
| 2373: RATE-DISTORTION
OPTIMIZATION OF MACROBLOCK-BASED PROGRESSIVE FINE GRANULARITY
SCALABLE VIDEO CODEC |
| |
| 2468: CONSTANT QUALITY RATE
CONTROL FOR STREAMING MPEG4-FGS VIDEO |
| |
| 2504: H.26L-BASED FINE
GRANULARITY SCALABLE VIDEO CODING |
| |
| 2542: EFFECT OF CNN SHAPE
SEGMENTATION ON MPEG-4 SHAPE BIT-RATE |
| |
| Top |
| |
Monday, May 27, 3:30 - 5:00:
Multimedia
Understanding and Segmentation
|
| |
| 2737: MOTION PATTERN BASED
VIDEO CLASSIFICATION USING SUPPORT VECTOR
MACHINES |
| |
| 2888: AUTOMATIC TIME STAMP
EXTRACTION SYSTEM FOR HOME VIDEOS |
| |
| 1336: MPEG VBR VIDEO TRAFFIC
CLASSIFICATION USING BAYESIAN AND NEAREST NEIGHBOR
CLASSIFIERS |
| |
| 2534: EXTENDED FISHERFACE FOR
FACE REOCOGNITION FROM A SINGLE EXAMPLE IMAGE PER
PERSON |
| |
| 1624: IMAGE SEGMENTATION
THROUGH INDEX IMAGES |
| |
| Top |
| |
Wednesday, May 29, 3:30 -
5:00: Wireless
Multimedia Transmission and
Packetization
|
| |
| 2482: ERROR-RESILIENT IMAGE
CODING AND TRANSMISSION OVER WIRELESS CHANNELS |
| |
| 2336: REAL-TIME TRANSMISSION
OF STEREO IMAGES OVER THE ACCESS GRID |
| |
| 1965: AN ADAPTIVE CONTROL OF
THE REQUEST ACCESS BANDWIDTH OF THE DQRUMA FOR PROVIDING THE
QOS IN AN OFDM-BASED W-ATM SYSTEM |
| |
| 1697: AN OPTIMAL
PACKETIZATION SCHEME FOR FINE GRANULARITY SCALABLE
BITSTREAM |
| |
| Top |
| |
Monday, May 27, 1:30 - 3:00:
Hardware
Implementation for Multimedia 2
|
| |
| 1745: MULTIPLE SEQUENCE
FAMILIES WITH EFFICIENT HARDWARE ARCHITECTURE FOR USE IN
SPREAD SPECTRUM WATERMARKING |
| |
| 1544: A HIGH PERFORMANCE
JPEG2000 ARCHITECTURE |
| |
| 2490: OPTIMIZATION OF
PORTABLE SYSTEM ARCHITECTURE FOR REAL-TIME 3D GRAPHICS
|
| |
| 2031: EFFICIENT PASS-PARALLEL
ARCHITECTURE FOR EBCOT IN JPEG2000 |
| |
| 2009: AN EFFICIENT
ARCHITECTURE OF DCTQ MODULE IN MPEG-4 VIDEO CODEC |
| |
| Top |
| |
Monday, May 27, 10:30 -
12:00: Multimedia
Communication and Transmission 2
|
| |
| 1284: OPTIMAL ADAPTIVE
BANDWIDTH MONITORING FOR QOS BASED RETRIEVAL |
| |
| 1267: JOINT SOURCE-CHANNEL
CONTENT-BASED MULTISTREAM VIDEO CODINGSCHEME |
| |
| 1764: TDMA-BASED
COMMUNICATION SCHEDULING IN SYSTEM-ON-CHIP VIDEO
ENCODER |
| |
| 2294: RECURSIVE PATCHING FOR
VIDEO-ON-DEMAND(VOD) SYSTEMS WITH LIMITED CLIENT BUFFER
CONSTRAINT |
| |
| 2633: DYNAMIC THROUGHPUT
ESTIMATION FOR WIRELESS MULTIMEDIA TRANSMISSION |
| |
| Top |
| |
Monday, May 27, 3:30 - 5:00:
3D Graphics and
Other Topics in Multimedia
|
| |
| 2943: BI-LEVEL/FULL-COLOR
VIDEO COMBINATION FOR UBIQUITOUS VIDEO
COMMUNICATION |
| |
| 2951: AN INTELLIGENT IEEE1394
HUB ARCHITECTURE |
| |
| 1253: TWO-LEVEL HIERARCHICAL
Z-BUFFER FOR 3D GRAPHICS HARDWARE |
| |
| 1459: 3D MESH COMPRESSION
USING TRIANGLE FAN STRUCTURE |
| |
| 3096: ERROR CONCEALMENT OF
MPEG-2 AAC AUDIO USING MODULO WATERMARKS |
| |
| Top |
| |
Monday, May 27, 3:30 - 5:00:
Communication
Circuits / Implementation
|
| |
| 2659: FLOATING GATE ANALOG
IMPLEMENTATION OF THE ADDITIVE SOFT-INPUT SOFT-OUTPUT DECODING
ALGORITHM |
| |
| 1842: PARALLEL VLSI
ARCHITECTURES FOR A CLASS OF LDPC CODES |
| |
| 2845: DIFFERENTIAL
TRANSIMPEDANCE AMPLIFIERS FOR COMMUNICATIONS SYSTEMS BASED ON
COMMON-GATE TOPOLOGY |
| |
| 1495: BENDING LOSS ANALYSIS
OF TE AND TM POLARIZED FIELDS IN PLANAR LIGHTWAVE
CIRCUITS |
| |
| 1496: WAVELENGTH SHIFT
ANALYSIS OF TE AND TM POLARIZED FIELDS IN PLANAR LIGHTWAVE
CIRCUITS |
| |
| Top |
| |
Monday, May 27, 1:30 - 3:00:
Topics in
Communication Theory
|
| |
| 3100: MONOCYCLE SHAPES FOR
ULTRA WIDEBAND SYSTEM |
| |
| 2559: JOINT
SPACE-MULTIPATH-DOPPLER RAKE RECEIVING IN DS-CDMA SYSTEMS OVER
TIME-SELECTIVE FADING CHANNELS |
| |
| 2769: ERROR CORRECTION BLOCK
BASED ARQ PROTOCOL FOR WIRELESS DIGITAL VIDEO
TRANSMISSION |
| |
| 1735: ITERATION REDUCTION OF
TURBO DECODERS USING AN EFFICIENT STOPPING/CANCELLATION
TECHNIQUE |
| |
| 3111: PERFORMANCE OF ACTIVE
CODES DETECTION ALGORITHMS FOR THE DOWNLINK OF TD-SCDMA
SYSTEM |
| |
| Top |
| |
Tuesday, May 28, 10:30 -
12:00: Communication
Networks
|
| |
| 1845: LINK ADAPTATION AND
RECEIVER DESIGN FOR ENHANCED GENERAL PACKET RADIO SERVICES
WIRELESS NETWORKS |
| |
| 2412: BANDWIDTH UTILIZATION
AND SIGNAL STRENGTH-BASED HANDOVER INITIATION IN MOBILE
MULTIMEDIA CELLULAR NETWORKS |
| |
| 1930: LOCAL RESOURCE
MANAGEMENT OF DISTRIBUTED SENSOR NETWORKS VIA STATIC OUTPUT
FEEDBACK CONTROL |
| |
| 2566: PERFORMANCE EVALUATION
OF SECURE REMOTE PASSWORD PROTOCOL |
| |
| 2341: NETWORK OPTIMIZATION
PROBLEM IN TIE-SET FLOW VECTOR SPACE AND INFORMATION NETWORK
RESOURCE MANAGEMENT |
| |
| Top |
| |
Monday, May 27, 10:30 -
12:00: Multiple
Antenna Systems / OFDM
|
| |
| 2397: SPACE-TIME CODES FOR
HIGH BIT RATE WIRELESSCOMMUNICATIONS:ASYMPTOTIC PERFORMANCE OF
SPACE-TIME RANDOM CODES. |
| |
| 2345: ADAPTIVE ANTENNA
SYSTEMS FOR MOBILE AD-HOC NETWORKS |
| |
| 2922: CHANNEL IDENTIFICATION
SCHEME FOR MODIFIED MC-CDMA SYSTEMS WITH THE MIXING MODEL OF
REPLICATING AND SERIAL-TO-PARALLEL CONVERTING |
| |
| 1698: SUBSPACE-BASED
ESTIMATION METHOD OF UPLINK FIR CHANNEL IN MC-CDMA SYSTEM
WITHOUT CYCLIC PREFIX OVER FREQUENCY-SELECTIVE FADING
CHANNEL |
| |
| 2725: POST-COMPENSATION OF RF
NON-LINEARITY IN MOBILE OFDM SYSTEMS BY ESTIMATION OF
MEMORY-LESS POLYNOMIAL |
| |
| Top |
| |
Tuesday, May 28, 8:30 -
10:00: Signal
Processing for Communications
|
| |
| 1415: BLIND SPACE-TIME
EQUALIZATION/DECODING WITH CARRIER FREQUENCY SYNCHRONIZATION
IN MULTICARRIER CDMA SYSTEMS |
| |
| 1335: A NEW EIGENFILTER BASED
METHOD FOR OPTIMAL DESIGN OF CHANNEL SHORTENING
EQUALIZERS |
| |
| 1372: CHANNEL FADING
ESTIMATION WITH UNEQUALLY SPACED PILOT SYMBOLS |
| |
| 1520: A NOVEL APPROACH TO AN
IIR DIGITAL FILTER BANK WITH APPROXIMATELY LINEAR
PHASE |
| |
| 2579: FILTER BANK BASED
NARROWBAND INTERFERENCE DETECTION AND SUPPRESSION IN SPREAD
SPECTRUM SYSTEMS |
| |
| Top |
| |
Wednesday, May 29, 8:30 -
10:00: Signal
Processing for Communications II
|
| |
| 1300: PERFORMANCE AND
COMPLEXITY ANALYSIS FOR ADAPTIVE SAMPLE RATE CONVERTERS IN
GSM/UMTS/HIPERLAN2 MOBILE TRANSCEIVER |
| |
| 2223: POWER-LINE
COMMUNICATIONS USING DWMT MODULATION |
| |
| 2203: ESTIMATION OF FAST
FADING CHANNEL IN IMPULSE NOISE ENVIRONMENT |
| |
| 2239: THE NORM CONSTRAINT
IQML BEAMFORMING ALGORITHM FOR WIDEBAND AND COHERENT JAMMERS
SUPPRESSION |
| |
| Top |
| |
Wednesday, May 29, 10:30 -
12:00: Topics in
Communication Theory II
|
| |
| 2830: AN ANALYSIS OF NOISE IN
TIMING-BASED COMMUNICATIONS OVER LANS |
| |
| 1652: LOWER-COMPLEXITY DIRECT
SYMBOL DETECTOR FOR MULTIUSER MC-CDMA SYSTEM USING ANTENNA
ARRAY WITHOUT VECTOR CHANNEL ESTIMATION |
| |
| 1680: AN ARRAY BASED
TECHNIQUE FOR ROUTING MESSAGES IN DISTRIBUTED DOUBLE-LOOP
NETWORKS |
| |
| 2299: ANALYSIS OF
HARDLIMITING PARALLEL INTERFERENCE CANCELLATION (PIC) FOR
SYNCHRONOUS CDMA COMMUNICATION |
| |
| 2608: USING SDL AS A TOOL FOR
SYSTEM SIMULATIONS |
| |
| Top |
| |
Tuesday, May 28, 8:30 -
10:00: Neural
Network Hardware Architecture and
Implementation
|
| |
| 1529: A GENERAL-PURPOSE
NEURAL NETWORK WITH ON-CHIP BP LEARNING |
| |
| 2097: HARDWARE PULSE MODE
NEURAL NETOWRK WITH PIECEWISE LINEAR ACTIVATION FUNCTION
NEURONS |
| |
| 2358: FLOATING-GATE
LOW-VOLTAGE / LOW-POWER LINEAR THRESHOLD ELEMENT FOR NEURAL
COMPUTATION |
| |
| 2367: A SIMULATION MODEL FOR
FLOATING-GATE MOS SYNAPSE TRANSISTORS |
| |
| 2733: IMPROVED CORRELATION
LEARNING RULE IN CONTINUOUSLY-ADAPTING FLOATING-GATE ARRAYS
USING LOGARITHMIC PRE-DISTORTION OF INPUT AND LEARNING
SIGNALS |
| |
| Top |
| |
Monday, May 27, 1:30 - 3:00:
Cellular Neural
Networks
|
| |
| 1543: A SEARCH ALGORITHM FOR
THE DESIGN OF MULTINESTED CELLULAR NEURAL
NETWORKS |
| |
| 2314: CELL AND NETWORK LEVEL
DESIGN OF A MIXED-MODE CNN |
| |
| 2803: ON THE OPTIMAL CHOICE
OF INTEGRATION TIME-STEP FOR RASTER SIMULATION OF A CNN FOR
GRAY LEVEL IMAGE PROCESSING |
| |
| 3060: IMPROVEMENT OF PATTERN
LEARNING AND RECOGNITION CAPABILITY IN RATIO-MEMORY CELLULAR
NEURAL NETWORKS WITH NON-DISCRETE-TYPE HEBBIAN LEARNING
ALGORITHM |
| |
| 1596: NECESSARY AND
SUFFICIENT CONDITIONS FOR ONE-DIMENSIONAL DISCRETE-TIME BINARY
CELLULAR NEURAL NETWORKS WITH BOTH A- AND B-TEMPLATES TO BE
STABLE |
| |
| Top |
| |
Monday, May 27, 3:30 - 5:00:
Neural Network
Hardware Architecture and
Implementation
|
| |
| 1157: AN EFFICIENT
IMPLEMENTATION OF MULTI-LAYER PERCEPTRON ON MESH
ARCHITECTURE |
| |
| 1166: A FAST INNER PRODUCT
PROCESSOR IMPLEMENTATION FOR MULTI-VALUED EXPONENTIAL
BIDIRECIONAL ASSOCIATIVE MEMORIES |
| |
| 1175: ANALOG IMPLEMENTATION
OF THE SOFT-MAX FUNCTION |
| |
| 2277: A NEURAL PARTICLE
DISCRIMINATOR BASED ON A MODIFIED ART
ARCHITECTURE |
| |
| 3067: A NEW
PSEUDO-BIPOLAR-JUNCTION-TRANSISTOR (PBJT) AND ITS APPLICATION
IN THE DESIGN OF RETINAL SMOOTHING NETWORK |
| |
| Top |
| |
Monday, May 27, 10:30 -
12:00: Cellular
Neural Networks
|
| |
| 1539: ACCURATE CMOS
IMPLEMENTATION OF PWL CNN NEURON ACTIVATIONS |
| |
| 1902: INITIATION AND TRACKING
OF DIM TARGET VIA FUSION OF FEATURE PROBABILITIES WITH
CNN-UM |
| |
| 2241: ON THE EXISTENCE OF
STABLE EQUILIBRIUM POINTS IN CELLULAR NEURAL
NETWORKS |
| |
| 2942: PROGRESSIVE IMAGE
RECONSTRUCTION VIA CELLULAR NEURAL NETWORKS |
| |
| 3048: THE TEMPLATE
OPTIMIZATION OF DISCRETE TIME CNN FOR IMAGE COMPRESSION AND
RECONSTRUCTION |
| |
| Top |
| |
Tuesday, May 28, 10:30 -
12:00: Other Areas
in NN&CNN
|
| |
| 1277: ON THE GLOBAL ROBUST
STABILITY OF DELAYED NEURAL NETWORKS |
| |
| 1999: OSCILLATORY HYSTERESIS
ASSOCIATIVE MEMORY |
| |
| 2276: IMPLEMENTATION ORIENTED
THEORY DESIGN ISSUES ON THE DTCNN TEMPLATE
GENERATION |
| |
| 2662: ENLARGING NEURAL CLASS
DETECTION IN PASSIVE SONAR SYSTEMS |
| |
| 3064: NON-SYMMETRIC PDF
APPROXIMATION BY ARTIFICIAL NEURONS: APPLICATION TO
STATISTICAL CHARACTERIZATION OF REINFORCED
COMPOSITES |
| |
| 2227: BINARY IMAGE ROTATION
USING CELLULAR NEURAL NETWORKS |
| |
| Top |
| |
Tuesday, May 28, 8:30 -
10:00: Fast Motion
Estimation Oral 1
|
| |
| 1460: A NOVEL ALL BINARY
MOTION ESTIMATION (ABME) |
| |
| 1317: REDUCING COMPUTATIONAL
COMPLEXITY OF ADAPTIVE MOTION ESTIMATION THROUGH BINARY
COMPARISON |
| |
| 1605: AN OPTIMIZED DIAMOND
SEARCH ALGORITHM FOR BLOCK MOTION ESTIMATION |
| |
| 2043: A NOVEL HYBRID MOTION
ESTIMATOR SUPPORTING DIAMOND SEARCH AND FAST FULL
SEARCH |
| |
| 1918: A NOVEL BLOCK MOTION
ESTIMATION ALGORITHM WITH CONTROLLABLE QUALITY AND SEARCHING
SPEED |
| |
| Top |
| |
Tuesday, May 28, 1:30 - 3:00:
Video over Networks
Oral 2
|
| |
| 2029: SEAMLESS SWITCHING OF
SCALABLE VIDEO BITSTREAMS |
| |
| 2487: A DYNAMIC
FRAME-SKIPPING VIDEO COMBINER FOR MULTIPOINT VIDEO
CONFERENCING |
| |
| 2749: EFFICIENT ERROR
RECOVERY TECHNIQUES IN A NOVEL MULTIMEDIA STREAMING FRAMEWORK
WITH PEER-PAIRED COLLABORATION |
| |
| 2715: MPEG-4 VIDEO ERROR
DETECTION BY USING DATA HIDING TECHNIQUES |
| |
| 2019: A ROBUST FINE
GRANULARITY SCALABILITY USING TRELLIS BASED PREDICTIVE
LEAK |
| |
| Top |
| |
Tuesday, May 28, 10:30 -
12:00: Global and
Local Motion Estimation Oral 3
|
| |
| 2445: FAST GLOBAL MOTION
ESTIMATION FOR SPRITE GENERATION |
| |
| 2153: A NOVEL PREDICTIVE
GLOBAL MOTION ESTIMATION |
| |
| 2228: PPFPS- A PARABOLOID
PREDICTION BASED FRACTIONAL PIXEL SEARCH STRATEGY FOR
H.26L |
| |
| 2425: LOW BAND SHIFT (LBS)
MOTION ESTIMATION WITH SYMMETRIC PADING |
| |
| Top |
| |
Tuesday, May 28, 3:30 - 5:00:
Video Segmentation
Oral 4
|
| |
| 2497: A ROBUST VIDEO OBJECT
SEGMENTATION SCHEME WITH PRESTORED BACKGROUND
INFORMATION |
| |
| 1871: AUTOMATIC VIDEO
SEGMENTATION USING A NOVEL BACKGROUND MODEL |
| |
| 1894: A NOVEL FRAMEWORK FOR
SEMI-AUTOMATIC VIDEO OBJECT SEGMENTATION |
| |
| 2969: DWT BASED HIERARCHICAL
VIDEO SEGMENTATION |
| |
| Top |
| |
Wednesday, May 29, 1:30 -
3:00: Image
Processing Oral 5
|
| |
| 3018: REMOVING OF BLOCKING
ARTEFACTS USING ERROR-COMPENSATION INTERPOLATION AND FAST
ADAPTIVE SPATIAL-VARYING FILTERING |
| |
| 2704: BLOCK LOSS RECOVERY IN
DCT IMAGE ENCODING USING POCS |
| |
| 2362: IMAGE QUALITY
OPTIMIZATION USING COMPUTATIONALLY EFFICIENT VARIABLE QOS
MULTICARRIER BIT ALLOCATION |
| |
| 1770: IMAGE QUALITY
ASSESSMENT BY USING NEURAL NETWORKS |
| |
| 2034: NON-CAUSAL ERROR
DIFFUSION FOR IMAGE HALFTONING |
| |
| Top |
| |
Wednesday, May 29, 10:30 -
12:00: Transcoding
and Edge Detection Oral 6
|
| |
| 1850: MOTION RE-ESTIMATION
FOR HDTV TO SDTV TRANSCODING |
| |
| 2541: METHODS AND NEEDS FOR
TRANSCODING MPEG-4 FINE GRANULARITY SCALABILITY
VIDEO |
| |
| 1285: REDUCED SPATIO-TEMPORAL
TRANSCODING USING AN INTRA REFRESH TECHNIQUE |
| |
| 1647: DCT-BASED EDGE DETECTOR
FOR SNAPSHOT IMAGES |
| |
| 2324: AN EVOLVABLE PREDICTOR
FOR LOSSLESS IMAGE COMPRESSION |
| |
| Top |
| |
Wednesday, May 29, 8:30 -
10:00: Hardware for
Video Signal Processing Oral 7
|
| |
| 2765: JPEG-2000 ON AN
ADVANCED ARCHITECTURE, MULTIPLE EXECUTION UNIT
DSP |
| |
| 2018: ANALYSIS OF EBCOT
DECODING ALGORITHM AND ITS VLSI IMPLEMENTATION FOR JPEG
2000 |
| |
| 2902: JPEG2000 ADAPTIVE RATE
CONTROL FOR EMBEDDED SYSTEMS |
| |
| 1679: A VECTOR BASED FAST
BLOCK MOTION ESTIMATION ALGORITHM FOR IMPLEMENTATION ON SIMD
ARCHITECTURES |
| |
| 2039: A HARDWARE ACCELERATOR
FOR VIDEO SEGMENTATION USING PROGRAMMABLE MORPHOLOGY PE
ARRAY |
| |
| Top |
| |
Wednesday, May 29, 3:30 -
5:00: Detection Oral
8
|
| |
| 2126: HAUSDORFF DISTANCE FOR
TARGET DETECTION |
| |
| 2621: ON THE USE OF HASH
FUNCTIONS FOR DEFECT DETECTION IN TEXTURES FOR IN-CAMERA WEB
INSPECTION SYSTEMS |
| |
| 2423: AUTOMATIC LOCALIZATION
OF HUMAN EYES IN COMPLEX BACKGROUND |
| |
| 2387: FACE DETECTION FROM
COLOR IMAGES BY ITERATIVE THRESHOLDING ON SKIN PROBABILITY
MAPS |
| |
| 2586: EXTRACTION OF VIDEO
OBJECTS BY COMBINED MOTION AND EDGE ANALYSIS |
| |
| Top |
| |
Monday, May 27, 1:30 - 3:00:
Image Compression
Poster 1
|
| |
| 2048: LOSSLESS, NEAR-LOSSLESS
AND LOSSY ADAPTIVE CODING BASED ON THE LOSSLESS
DCT |
| |
| 3076: CANNY EDGE BASED IMAGE
EXPANSION |
| |
| 1599: LOSSLESS WAVELET IMAGE
CODING USING LAYERED COEFFICIENT PARTITIONING |
| |
| 2459: VECTOR QUANTIZATION
FAST SEARCH ALGORITHM |
| |
| 2912: A HIERARCHICAL FAST
ENCODING ALGORITHM FOR VECTOR QUANTIZATION WITH PSNR
EQUIVALENT TO FULL SEARCH |
| |
| Top |
| |
Monday, May 27, 3:30 - 5:00:
Image Processing and
Sensors Poster 3
|
| |
| 2226: RELATIVE ENTROPY-BASED
METHODS FOR IMAGE THRESHOLDING |
| |
| 2111: IMPLEMENTATION OF A
ROBUST IMAGE REGISTRATION ALGORITHM ON AN ARM SYSTEM-ON-CHIP
PLATFORM |
| |
| 2923: HIGH PERFORMANCE
WAVELET-BASED STEREO IMAGE CODING |
| |
| 1463: A HIERARCHICAL COMBINED
FEATURE- AND AREA- BASED STEREO MATCHING
ALGORITHM |
| |
| 2506: NETWORKED LARGE-SCALE
IMAGE SENSING SYSTEM USING SPATIALLY-VARIANT SAMPLING SMART
IMAGE SENSORS |
| |
| Top |
| |
Tuesday, May 28, 8:30 -
10:00: Video Signal
Processing Poster 4
|
| |
| 2348: XML-BASED MPEG-4 VIDEO
REPRESENTATION AND ERROR RESILIENCE |
| |
| 3042: MULTI-RATE ENCODING OF
A VIDEO SEQUENCE IN THE DCT DOMAIN |
| |
| Top |
| |
Tuesday, May 28, 8:30 -
10:00: Applications
for Image and Video Processing Poster
2
|
| |
| 2519: ROBUST CALCULATION OF
FRACTAL DIMENSION OF IMAGES AND ITS APPLICATIONS TO
CLASSIFICATION OF ULTRASONIC LIVER IMAGES AND TEXTURE
IMAGES |
| |
| 3000: SWIMMER MOTION ANALYSIS
WITH APPLICATION TO DROWNING DETECTION |
| |
| 1206: MOTION COMPENSATED
ASMKF FOR RESTORATION OF COLOR VIDEO SEQUENCES CORRUPTED BY
IMPULSIVE NOISE |
| |
| 1396: MIXING CHAOTIC
WATERMARKS FOR EMBEDDING IN WAVELET TRANSFORM DOMAIN
|
| |
| 2000: A ROBUST DWT-BASED
BLIND DATA HIDING ALGORITHM |
| |
| Top |
| |
Monday, May 27, 1:30 - 3:00:
MEM
Devices
|
| |
| 1373: A MEMS SOCKET SYSTEM
FOR HIGH DENSITY SOC INTERCONNECTION |
| |
| 2505: ULTRASONIC BEARING
ESTIMATION USING A MEMS MICROPHONE ARRAY AND SPATIOTEMPORAL
FILTERS |
| |
| 2427: ROBUST TECHNIQUES FOR
DESIGN, POST-PROCESSING AND PACKAGING FOR ARRAYS OF BIO-MEMS
DEVICES |
| |
| 3110: IMPROVED DATA
ACQUISITION SYSTEM FOR DIGITAL FLOW CYTOMETRY |
| |
| 2325: LOGARITHMIC
PROGRAMMABLE PREAMPLIFIER DEDICATED TO ULTRASONIC
RECEIVERS |
| |
| Top |
| |
Monday, May 27, 3:30 - 5:00:
Sensors and
Processing Circuits
|
| |
| 1391: TEMPERATURE SENSOR
APPLICATIONS OF DIODE-CONNECTED MOS TRANSISTORS |
| |
| 1728: A CMOS INTERFACE FOR
RESISTIVE BRIDGE TRANSDUCERS |
| |
| 2206: A SMART SINGLE-CHIP
MICRO-HOTPLATE-BASED CHEMICAL SENSOR SYSTEM IN
CMOS-TECHNOLOGY |
| |
| 2247: A CMOS PHOTOSENSOR
TEST-CHIP FOR SMOKE DETECTION APPLICATIONS |
| |
| 2500: AN ON/OFF TRANSIENT
IMAGER WITH EVENT-DRIVEN, ASYNCHRONOUS READ-OUT |
| |
| Top |
| |
Tuesday, May 28, 8:30 -
10:00: MEMS, Sensors
and Processing Systems
|
| |
| 3105: NEW DESIGN FOR MAGNETIC
STORAGE ELEMENTS OF MICRO POWER SUPPLIES |
| |
| 2279: EVALUATION OF THE VLSI
ADAPTATION OF THE CHEMFET, A BIOSENSOR FOR FLUID
ANALYSIS |
| |
| 2195: TECHNOLOGIES AND
ARCHITECTURES FOR AUTONOMOUS ''MEMS'' MICROROBOTS |
| |
| 2067: A NOVEL PRESSURE
BALANCED MICROFLUIDIC VALVE |
| |
| 2798: A CMOS SIGNAL
CONDITIONING CIRCUIT FOR PIEZORESISTIVE PRESSURE
SENSORS |
| |
| Top |
| |
Wednesday, May 29, 1:30 -
3:00: Nanoelectronics Oral 1
|
| |
| 2850: LOW-POWER CIRCUIT
ADVANTAGES OF THE SCALED ACCUMULATION FET |
| |
| 2965: CIRCUITS AND DEVICES
WITH INTEGRATED VFETS AND RTDS |
| |
| 2130: AN 8-QUBIT
QUANTUM-CIRCUIT PROCESSOR |
| |
| 2234: SELF-ORGANISING
BEHAVIOR OF ARRAYS OF NON IDENTICAL JOSEPHSON
JUNCTIONS |
| |
| 1686: IMAGE PROCESSING WITH
QUANTUM DOT NANOSTRUCTURES |
| |
| Top |
| |
Wednesday, May 29, 3:30 -
5:00: Nanoelectronics Poster 1
|
| |
| 2775: A SET QUANTIZER CIRCUIT
AIMING AT DIGITAL COMMUNICATION SYSTEM |
| |
| 1452: RISE TIME ANALYSIS OF
MOBILE CIRCUIT |
| |
| 1722: A SPICE MODEL FOR
SINGLE ELECTRONICS |
| |
| Top |
| |
Monday, May 27, 3:30 - 5:00:
Signal Processing
for Communications
|
| |
| 3187: CHIP-INTERLEAVED
BLOCK-SPREAD CDMA FOR THE DOWNLINKWITH INTER-CELL INTERFERENCE
AND SOFT HAND-OFF |
| |
| 3188: BLIND EQUALIZATION BY
SEQUENTIAL IMPORTANCE SAMPLING |
| |
| 3232: A NEW ALGORITHM FOR QAM
SIGNAL CLASSIFICATION IN AWGN CHANNELS |
| |
| 3189: FURTHER RESULTS ON
BLIND EQUALIZATION AND ESTIMATION OF SIMO TIME-VARYING
CHANNELS |
| |
| 3186: SPACE-TIME CODES FOR
HIGH BIT RATE WIRELESS COMMUNICATIONS: ASYMPTOTIC PERFORMANCE
OF SPACE-TIME RANDOM CODES |
| |
| 3198: MIMO WIRELESS CHANNELS
MADE SIMPLE |
| |
| Top |
| |
Tuesday, May 28, 10:30 -
12:00: Speech and
Audio Processing
|
| |
| 1804: ROBUST PITCH ESTIMATION
USING AN EVENT BASED ADAPTIVE GAUSSIAN DERIVATIVE
FILTER |
| |
| 3035: FUZZY NEURAL NETWORK
FOR PHONEME SEQUENCE RECOGNITION |
| |
| 2447: ADAPTATION OF DATA
FUSION-BASED SPEAKER VERIFICATION MODELS |
| |
| 2435: FEATURE EXTRACTION FOR
ROBUST SPEECH RECOGNITION |
| |
| 1837: SNR AND BANDWIDTH
SCALABLE SPEECH CODING |
| |
| 1676: DIGITAL SINGING VOICE
SYNTHESIS USING A NEW ALTERNATING REFLECTION
MODEL |
| |
| Top |
| |
Wednesday, May 29, 10:30 -
12:00: Digital
Methods for Improving Delta-Sigma
Performance
|
| |
| 3147: QUADRATURE
MISMATCH-SHAPING |
| |
| 3139: SEGMENTED
MISMATCH-SHAPING D/A CONVERSION |
| |
| 3159: DYNAMIC ELEMENT
MATCHING IN LOW OVERSAMPLING DELTA SIGMA ADCS |
| |
| 3236: DELTA-SIGMA ALGORITHMIC
ANALOG-TO-DIGITAL CONVERSION |
| |
| 3145: DIGITAL CORRELATION
TECHNIQUE FOR THE ESTIMATION AND CORRECTION OF DAC ERRORS IN
MULTIBIT MASH DELTA SIGMA ADCS |
| |
| Top |
| |
Tuesday, May 28, 1:30 - 3:00:
Frequency Response
Masking Techniques
|
| |
| 1855: FRM BASED FIR FILTER
DESIGN --- THE WLS APPROACH |
| |
| 3135: OPTIMIZATION OF
FREQUENCY-RESPONSE-MASKING BASED FIR FILTERS WITH REDUCED
COMPLEXITY |
| |
| 2591: EFFICIENT
IMPLEMENTATION FOR COSINE-MODULATED FILTER BANKS USING THE
FREQUENCY-RESPONSE MASKING APPROACH |
| |
| 3121: FREQUENCY-RESPONSE
MASKING FIR FILTERS WITH SHORT DELAY |
| |
| 3120: A MODIFIED STRUCTURE
FOR THE DESIGN OF SHARP FIR FILTERS USING FREQUENCY-RESPONSE
MASKING TECHNIQUE |
| |
| 2099: TRANSCRIPTION OF
POLYPHONIC SIGNALS USING FAST FILTER BANK |
| |
| Top |
| |
Wednesday, May 29, 8:30 -
10:00: Bionics and
CNN Technology
|
| |
| 3202: A REALISTIC MAMMALIAN
RETINAL MODEL IMPLEMENTED ON COMPLEX CELL CNN UNIVERSAL
MACHINE |
| |
| 3200: A CELLULAR NONLINEAR
APPROACH TO DECENTRALIZED LOCOMOTION CONTROL OF THE STICK
INSECT |
| |
| 3242: TOWARDS FAST SOLID
STATE DNA SEQUENCING |
| |
| 3205: ADVANCED NEURAL
IMPLANTS USING THIN-FILM POLYMERS |
| |
| 3162: CELLULAR NEURAL
NETWORKS FOR THE ANTICIPATION OF EPILEPTIC
SEIZURES |
| |
| Top |
| |
Tuesday, May 28, 8:30 -
10:00: Smart Sensors
1
|
| |
| 3229: SINGLE CHIP FOR
IMAGING, COLOR SEGMENTATION, HISTOGRAMMING AND PATTERN
MATCHING |
| |
| 3225: AN ADAPTIVE VISUAL
TRACKING SENSOR WITH A HYSTERETIC WINNER-TAKE-ALL
NETWORK |
| |
| 3137: AN APS WITH 2-D WTA
SELECTION EMPLOYING ADAPTIVE SPATIAL FILTERING, BAD PIXEL
ELIMINATION AND FALSE ALARM REDUCTION |
| |
| 3226: AN IMPROVED 2D OPTICAL
FLOW SENSOR FOR MOTION SEGMENTATION |
| |
| 3248: A CMOS IMAGER WITH
ON-CHIP TEMPORAL FILTERING FOR MOTION
PRE-PROCESSING |
| |
| Top |
| |
Tuesday, May 28, 10:30 -
12:00: Smart Sensors
2
|
| |
| 3228: ON-OFF DIFFERENTIAL
CURRENT-MODE CIRCUITS FOR GABOR-TYPE SPATIAL
FILTERING |
| |
| 3123: A CONTINUOUS-TIME
SPEECH ENHANCEMENT FRONT-END FOR MICROPHONE
INPUTS |
| |
| 3234: A MONOLITHIC
IMPLEMENTATION OF INTERFACE CIRCUITRY FOR CMOS COMPATIBLE
GAS-SENSOR SYSTEM |
| |
| 2283: SYSTEM ARCHITECTURE FOR
MULTI-TECHNOLOGY TESTBENCH-ON-A-CHIP |
| |
| 3251: VLSI POTENTIOSTAT ARRAY
FOR DISTRIBUTED ELECTROCHEMICAL NEURAL RECORDING |
| |
| Top |
| |
Tuesday, May 28, 3:30 - 5:00:
Advanced Signal
Processing for MIMO Systems
|
| |
| 3203: AUTOCORRELATION - A NEW
DIFFERENTIATING DOMAIN FOR MULTIPLE ACCESS WIRELESS
COMMUNICATIONS |
| |
| 3207: SPACE-TIME CODING FOR
DOUBLY-SELECTIVE CHANNELS |
| |
| 3208: CHANNEL ESTIMATION FOR
LONG-CODE WCDMA |
| |
| 3235: ON THE IMPACT OF
CORRELATED FADING FOR MIMO-SYSTEMS |
| |
| 3211: A SIMPLE CUMULANT BASED
APPROACH FOR MULTIUSER CHANNEL IDENTIFICATION |
| |
| Top |
| |
Wednesday, May 29, 1:30 -
3:00: Electronic
Design for Quality
|
| |
| 3173: STATIC TIMING ANALYSIS
BASED CIRCUIT-LIMITED-YIELD ESTIMATION |
| |
| 3160: REGRESSION CRITERIA AND
THEIR APPLICATION IN DIFFERENT MODELING CASES |
| |
| 3157: A NEW METHODOLOGY FOR
THE STATISTICAL ANALYSIS OF VLSI CMOS CIRCUITS AND ITS
APPLICATION TO FLASH MEMORIES |
| |
| 3238: MISMATCH-INDUCED
TRADEOFFS AND SCALABILITY OF MIXED-SIGNAL VISION
CHIPS |
| |
| 2712: RESISTORS LAYOUT FOR
ENHANCING YIELD OF R-2R DACS |
| |
| Top |
| |
Monday, May 27, 3:30 - 5:00:
Towards
Nanoelectronic Integrated Circuits
|
| |
| 3131: MOLECULAR-SCALE
ENGINEERING FOR FUTURE ELECTRONICS |
| |
| 3168: DEFECT-TOLERANT
MOLECULAR ELECTRONICS |
| |
| 3249: HIGH-SPEED AND
LOW-POWER CELLULAR NON-LINEAR NETWORKS USING SINGLE-ELECTRON
TUNNELING TECHNOLOGY |
| |
| Top |
| |
Monday, May 27, 1:30 - 3:00:
Multimedia over IP
and over Wireless Network II
|
| |
| 3241: REAL-TIME STREAMING FOR
THE ANIMATION OF TALKING FACES IN MULTIUSER
ENVIRONMENTS |
| |
| 3185: LAYERED VIDEO OVER IP
NETWORKS BY USING SELECTIVE DROP ROUTERS |
| |
| 3233: FGS+: OPTIMIZING THE
JOINT SNR-TEMPORAL VIDEO QUALITY IN MPEG-4 FINE GRAINED
SCALABLE CODING |
| |
| 3165: VIDEO CODING WITH
VIRTUAL SET PARTITIONING IN HIERARCHICAL TREE |
| |
| 3148: PERCEPTUAL FRAME
DROPPING IN ADAPTIVE VIDEO STREAMING |
| |
| 3169: TCP-COMPATIBLE RATE
CONTROL FOR FGS LAYERED MULTICAST VIDEO TRANSMISSION BASED ON
A CLUSTERING ALGORITHM |
| |
| Top |
| |
Monday, May 27, 10:30 -
12:00: Multimedia
over IP and over Wireless Network
I
|
| |
| 3175: THIRD-GENERATION AND
BEYOND (3.5G) WIRELESS NETWORKS AND ITS
APPLICATIONS |
| |
| 3199: ADAPTIVE PLAYOUT FOR
REAL-TIME MEDIA STREAMING |
| |
| 3219: ROBUST VIDEO MULTICAST
UNDER RATE AND CHANNEL VARIABILITY WITH APPLICATIONS TO
WIRELESS LANS |
| |
| 3179: ADAPTIVE END-TO-END
OPTIMIZATION OF MOBILE VIDEO STREAMING USING QOS
NEGOTIATION |
| |
| 3209: VIDEO TRANSPORT OVER
AD-HOC NETWORKS USING MULTIPLE PATHS |
| |
| 3161: ERROR ROBUST VIDEO
TRANSMISSION OVER WIRELESS IP NETWORKS WITH MULTIUSER
DETECTION |
| |
| Top |
| |
Wednesday, May 29, 3:30 -
5:00: Modeling,
Simulation and Design of Power Electronics
Circuits
|
| |
| 3172: VOLTAGE-CLAMPED CLASS E
AMPLIFIER WITH A ZENER DIODE ACROSS THE CHOKE
COIL |
| |
| 3177: CLASS-E MOSFET
LOW-VOLTAGE POWER OSCILLATOR |
| |
| 2771: IMPACT OF BOOST
CONVERTER PARAMETERS ON OPEN-LOOP DYNAMIC PER-FORMANCE FOR
DCM |
| |
| 3176: CLASS-N HIGH-FREQUENCY
POWER AMPLIFIER |
| |
| 3182: GENERALIZED STATE-PLANE
ANALYSIS OF SOFT-SWITCHING DC-DC CONVERTERS |
| |
| 3181: ASYMMETRY HALF BRIDGE
SOFT-SWITCHING PFC CONVERTER WITH DIRECT ENERGY
TRANSFER |
| |
| Top |
| |
Wednesday, May 29, 8:30 -
10:00: Interconnected array systems (CNNs) and unconventional
devices and materials
|
| |
| 3201: ELECTRO-ACTIVE POLYMERS
AS CNN ACTUATORS FOR LOCOMOTION CONTROL |
| |
| 3221: DEVELOPMENT OF
AUTONOMOUS, MOBILE MICRO-ELECTRO-MECHANICAL
DEVICES |
| |
| 3222: INTERCONNECTED RESONANT
GYROS FOR IMPROVED PERFORMANCE |
| |
| 3220: NOISE-MEDIATED
COOPERATIVE BEHAVIOR IN A SYSTEM OF COUPLED DC
SQUIDS |
| |
| 3224: ORGANIC MOLECULES AND
COMPOSITES WITH APPLICATIONS IN MICRO AND NANOELECTRONIC
SYSTEMS |
| |
| 3223: A CMOS COUPLED
NONLINEAR OSCILLATOR ARRAY |
| |
| Top |
| |
Tuesday, May 28, 8:30 -
10:00: Multimedia
Watermarking
|
| |
| 3138: FRAGILE SPEECH
WATERMARKING FOR CONTENT INTEGRITY VERIFICATION |
| |
| 3136: A NEW SEMI-FRAGILE
IMAGE AUTHENTICATION FRAMEWORK COMBINING ECC AND PKI
INFRASTRUCTURES |
| |
| 3155: A ROBUST TYPE-III DATA
HIDING TECHNIQUE AGAINST CROPPING & RESIZING
ATTACKS |
| |
| 3132: A NOVEL SEMI-PRIVATE
WATERMARKING TECHNIQUE |
| |
| 3133: WATERMARKING OF
STREAMING VIDEO FOR FINGER-PRINTING APPLICATIONS |
| |
| 3134: PERCEPTUALLY BASED
WATERFILLING FOR WATERMARKING |
| |
| Top |
| |
Tuesday, May 28, 1:30 - 3:00:
Multidimensional
Signals and Systems
|
| |
| 3215: A PROPERTY OF JACOBIAN
MATRICES AND SOME OF ITS CONSEQUENCES |
| |
| 3247: ON MULTIDIMENSIONAL
SPECTRAL FACTORIZATION |
| |
| 3216: MINIMAX DESIGN OF 2-D
IIR DIGITAL FILTERS USING SEQUENTIAL SEMIDEFINITE
PROGRAMMING |
| |
| 3217: ON THE GEODESIC PATHS
APPROACH TO MULTICHANNEL SIGNAL PROCESSING |
| |
| 3214: IMPOVED WAVE DIGITAL
APPROACH TO NUMERICALLY INTERGRATING TE PDES OF LUID
DYNAMICS |
| |
| Top |
| |
Tuesday, May 28, 3:30 - 5:00:
Computational Graph
Theory for Computer and Communication
Systems
|
| |
| 3170: ALGORITHMIC ASPECTS OF
UNCERTAINTY DRIVEN SCHEDULING |
| |
| 3206: THE BI-WEIGHTED TSP
PROBLEM FOR CROSSTALK MINIMIZATION |
| |
| 3190: THE PRIME-GRAPH AND
Q-SEQUENCE FOR CODING THE FLOORPLAN |
| |
| 3164: QUALITY OF SERVICE
ROUTING: HEURISTICS AND APPROXIMATION SCHEMES WITH A
COMPARATIVE EVALUATION |
| |
| 3163: ON THREE-DIMENSIONAL
LAYOUT OF DE BRUIJN NETWORKS |
| |
| Top |
| |
Wednesday, May 29, 10:30 -
12:00: Statistical
Methodologies for Nonlinear Signal
Processing
|
| |
| 3149: NEW METHOD FOR
TAILORING RIPPLE AND SPECTRAL PROPERTIES OF CHAOTIC DC-DC
CONVERTERS |
| |
| 3150: STATISTICAL ANALYSIS OF
POWER SPECTRA OF SIGNALS GOVERNED BY MARKOV
CHAINS |
| |
| 3151: SIGNAL CODING AND
COMPRESSION BASED ON DISCRETE-TIME CHAOS: STATISTICAL
APPROACHES |
| |
| 3152: POTENTIAL OF CHAOS
COMMUNICATION OVER NOISY CHANNELS - CHANNEL CODING USING
CHAOTIC PIECEWISE LINEAR MAPS |
| |
| 3153: AN APPROACH TO
STATISTICAL ANALYSIS OF COARSELY TIME-MARKOV
SYSTEMS |
| |
| Top |
